A field-programmable gate array (FPGA)-based data acquisition system for closed-loop experiments. [PDF]
Delgadillo Bonequi I +2 more
europepmc +2 more sources
Implementasi Logika Fuzzy Pada Sistem Berbasis Field Programmable Gate Array (FPGA) [PDF]
Penggunaan perangkat mikrokontroller dewasa ini semakin banyak dipergunakan seperti arduino, atmega, FPGA dan lain sebagainya. Salah satu perangkat tersebut adalah FPGA (Field Programmable Gate Array). Bahasa yang digunakan pada FPGA adalah VHDL atau VHSIC (Very High Speed Integrated Circuit Hardware Description Language) merupakan salah satu jenis ...
Mochammad Hannats Hanafi Ichsan +2 more
doaj +2 more sources
Field-Programmable Gate Array (FPGA)-Based Lock-In Amplifier System with Signal Enhancement: A Comprehensive Review on the Design for Advanced Measurement Applications. [PDF]
Galaviz-Aguilar JA +3 more
europepmc +2 more sources
FPGA Implementation of Threshold-Type Binary Memristor and Its Application in Logic Circuit Design
In this paper, a memristor model based on FPGA (field programmable gate array) is proposed, by using which the circuit of AND gate and OR gate composed of memristors is built. Combined with the original NOT gate in FPGA, the NAND gate, NOR gate, XOR gate
Liu Yang +3 more
doaj +1 more source
Implementing EW Receivers Based on Large Point Reconfigured FFT on FPGA Platforms [PDF]
This paper presents design and implementation of digital receiver based on large point fast Fourier transform (FFT) suitable for electronic warfare (EW) applications.
He Chen +3 more
doaj +1 more source
Wykorzystanie struktur FPGA do implementacji algorytmów cyfrowego przetwarzania sygnałów [PDF]
W artykule opisano zaprojektowany, wykonany praktycznie oraz przebadany dwukanałowy tor cyfrowego przetwarzania sygnału z układem FPGA (Field-Programmable Gate Array), w którym zaimplementowano algorytmy DSP.
Stanisław GRZYWIŃSKI +1 more
doaj +1 more source
An efficient AES implementation using FPGA with enhanced security features
Data transferred in an electronic way is vulnerable to attacks. With an aim to protect data for secure communication, a new Hybrid non pipelined Advanced Encryption Standard (AES) algorithm based on traditional AES algorithm with enhanced security ...
Harshali Zodpe, Ashok Sapkal
doaj +1 more source
This study proposes an implementation based on a low-cost field-programmable gate array (FPGA) of a high-resolution pulse width modulation applied on a single-phase power factor correction (PFC) converter operating with 2 MHz switch frequency.
José Augusto Arbugeri +2 more
doaj +1 more source
Programmable Logic Devices in Experimental Quantum Optics [PDF]
We discuss the unique capabilities of programmable logic devices (PLD's) for experimental quantum optics and describe basic procedures of design and implementation.
Andrews +12 more
core +2 more sources
Hardware acceleration of number theoretic transform for zk‐SNARK
An FPGA‐based hardware accelerator with a multi‐level pipeline is designed to support the large‐bitwidth and large‐scale NTT tasks in zk‐SNARK. It can be flexibly scaled to different scales of FPGAs and has been equipped in the heterogeneous acceleration system with the help of HLS and OpenCL.
Haixu Zhao +6 more
wiley +1 more source

