Architecture design of re-configurable convolutional neural network on software definition
In order to meet the flexibility and efficiency requirement in convolutional neural network (CNN), an architecture of re-configurable CNN based on software definition was proposed.
LI Peijie, ZHANG Li+1 more
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The advancement of cluster based FPGA place & route technic [PDF]
As one of the core components of electronic hardware systems, Field Programmable Logic Array (FPGA) device design technology continues to advance under the guidance of electronic information technology policies, and has made information technology ...
Zhou Zhimei+5 more
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Sampler – Open-Source Data Acquisition Module for Quantum Physics [PDF]
The Sinara hardware platform is a modular, opensource measurement and control system dedicated to quantum applications that require hard real-time performance.
Grzegorz Kasprowicz+8 more
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Novel hybrid strong and weak PUF design based on FPGA
Physically unclonable function (PUF) can produce intrinsic keys with characteristics of randomness, uniqueness and tamper-proof by exploiting the process deviations which can not be avoided in the chip manufacturing process.
LIAN Jiana+2 more
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System noise of a digital pulse processing module for nuclear instrumentation [PDF]
Digital pulse processing finds a widespeed use in nuclear instrumentation. This work presents a digital pulse processing (DPP) module based on an FPGA and a 16-bit 125 MHz ADC and analyses the system noise distribution by acquired digital data using this
Ma Y+4 more
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Análisis de desempeño de capas de CNN para arquitecturas heterog´eneas basadas en FPGAs usando HLS
Contexto: Las redes neuronales convolucionales (CNNs) son actualmente utilizadas en una amplia gama de aplicaciones de inteligencia artificial. En muchos casos, dichas aplicaciones requieren la ejecución de las redes en tiempo real en dispositivos ...
Mateo Guerra Londono+4 more
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FPGA-based heterogeneous acceleration study for multidimensional cubing [PDF]
Today’s information processing not only faces an explosion of data volume and data dimensions, but also has to meet the growing user requirements for timeliness.
Meng Yuan, Yang Jun, Li Jun
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Optimization and FPGA implementation of RS coding algorithm
Aiming at the problems of large amount of computation and high complexity of multiplication of Galois Field(GF) in the common RS coding algorithm, the RS coding module is optimized and the multiplier factor is obtained.
Li Jinming, Liu Mengxin, Cheng Naipeng
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High Throughput Implementation of the Keccak Hash Function Using the Nios-II Processor
Presently, cryptographic hash functions play a critical role in many applications, such as digital signature systems, security communications, protocols, and network security infrastructures.
Argyrios Sideris+2 more
doaj +1 more source
Analysis of a novel FPGA-based system for filtering audio signals using a finite impulse response filters [PDF]
In this article, an analysis of an innovative system for filtering signals in the audible range (16 Hz - 20 kHz) on programmable logic devices using a filters with a finite impulse response, is presented. Mentioned system was neat combination of software
Adrian Lipowski+2 more
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