Results 31 to 40 of about 232,466 (264)
BiCAM-based automated scoring system for digital logic circuit diagrams
Open Chemistry, 2022 In online education, it is critical for the quality of education to evaluate and grade the assignments or examinations that students upload to the system.
Öztekin Halit
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2010 International Conference on Field Programmable Logic and Applications, 2010 Integer addition is a universal building block, and applications such as quad-precision floating-point or elliptic curve cryptography now demand precisions well beyond 64 bits. This study explores the trade-offs between size, latency and frequency for pipelined large-precision adders on FPGA.
de Dinechin, Florent +2 more
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FPGA Implementation of Spectral Subtraction for In-Car Speech Enhancement and Recognition [PDF]
, 2008 The use of speech recognition in noisy environments requires the use of speech enhancement algorithms in order to improve recognition performance. Deploying these enhancement techniques requires significant engineering to ensure algorithms are realisable
Deo, Kapeel +3 more
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Caffeinated FPGAs: FPGA framework For Convolutional Neural Networks [PDF]
2016 International Conference on Field-Programmable Technology (FPT), 2016 Convolutional Neural Networks (CNNs) have gained significant traction in the field of machine learning, particularly due to their high accuracy in visual recognition. Recent works have pushed the performance of GPU implementations of CNNs to significantly improve their classification and training times.
Graham W. Taylor +5 more
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FMCW rail-mounted SAR: Porting spotlight SAR imaging from MATLAB to FPGA [PDF]
, 2014 In this work, a low-cost laptop-based radar platform derived from the MIT open courseware has been implemented. It can perform ranging, Doppler measurement and SAR imaging using MATLAB as the processor.
Gray, D., Le Kernec, J., Melnikov, A.
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Using an FPGA for Fast Bit Accurate SoC Simulation [PDF]
, 2007 In this paper we describe a sequential simulation method to simulate large parallel homo- and heterogeneous systems on a single FPGA. The method is applicable for parallel systems were lengthy cycle and bit accurate simulations are required.
Hölzenspies, P.K.F. +2 more
core +2 more sources
Start Acceleration of the Space GPS Receiver [PDF]
International Journal of Electronics and Telecommunications, 2020 The cold start of the space GPS receiver, i.e. the start without any information about the receiver position, satellite constellation, and time, is complicated by a large Doppler shift of a navigation signal caused by the satellite movement on the Earth ...
Pavel Kovář
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Fixed-latency System for High-speed Serial Transmission Between FPGA Devices with Forward Error Correction [PDF]
International Journal of Electronics and Telecommunications, 2020 This paper presents the design of a compact protocol for fixed-latency, high-speed, reliable, serial transmission between simple field-programmable gate arrays (FPGA) devices.
Michał Kruszewski +1 more
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A single-chip FPGA implementation of real-time adaptive background model [PDF]
, 2005 This paper demonstrates the use of a single-chip FPGA for the extraction of highly accurate background models in real-time. The models are based on 24-bit RGB values and 8-bit grayscale intensity values.
Appiah, Kofi, Hunter, Andrew
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2023 31st Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP), 2023 Writing good code for FPGA is a challenge “per se”, but also running already existing and optimized FPGA kernels often requires writing specific “host side” code and some target hardware knowledge to achieve good performances. In this work, we describe a FastFlow extension supporting seamless off loading of tasks to FPGA, once an FPGA kernel is ...
Danelutto, Marco +4 more
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