Results 51 to 60 of about 233,690 (225)
Hierarchical reconfiguration of FPGAs [PDF]
2014 24th International Conference on Field Programmable Logic and Applications (FPL), 2014 Partial reconfiguration allows some applications to substantially save FPGA area by time sharing resources among multiple modules. In this paper, we push this approach further by introducing hierarchical reconfiguration where reconfigurable modules can have reconfigurable submodules.
Christian Beckhoff, Dirk Koch
openaire +4 more sources
Solving the global atmospheric equations through heterogeneous reconfigurable platforms [PDF]
, 2014 One of the most essential and challenging components in climate modeling is the atmospheric model. To solve multiphysical atmospheric equations, developers have to face extremely complex stencil kernels that are costly in terms of both computing and ...
Fu, H +7 more
core +1 more source
Transition Based Synthesis with Modular Encoding of Petri Nets into FPGAs
Advances in Electrical and Electronic Engineering, 2014 The paper describes a new method for the synthesis of the application specific logic controllers, targeted into the FPGA. The initial steps of the proposed control algorithm rely on the notion of a Petri net, which is an easy way to describe parallel ...
Arkadiusz Bukowiec +2 more
doaj +1 more source
Sensors, 2020 Wireless Capsule Endoscopy is a state-of-the-art technology for medical diagnoses of gastrointestinal diseases. The amount of data produced by an endoscopic capsule camera is huge.
Ioannis Intzes +2 more
doaj +1 more source
FPGA-Based Bandwidth Selection for Kernel Density Estimation Using High Level Synthesis Approach
, 2015 FPGA technology can offer significantly hi\-gher performance at much lower power consumption than is available from CPUs and GPUs in many computational problems.
Gramacki, Artur +2 more
core +1 more source
Efficient hardware debugging using parameterized FPGA reconfiguration [PDF]
, 2016 Functional errors and bugs inadvertently introduced at the RTL stage of the design process are responsible for the largest fraction of silicon IC re-spins.
Kourfali, Alexandra, Stroobandt, Dirk
core +2 more sources
On Ladder Diagrams Compilation and Synthesis to FPGA Implemented Reconfigurable Logic Controller
Advances in Electrical and Electronic Engineering, 2014 The paper presents synthesis process of a hardware implemented reconfigurable logic controller from a ladder diagram according to IEC61131-3 requirements. It is focused on the originally developed a high-performance LD processing method.
Adam Milik
doaj +1 more source
Scientific ReportsIn the field of Brain Machine Interface (BMI), the process of translating motor intention into a machine command is denoted as decoding. However, despite recent advancements, decoding remains a formidable challenge within BMI.
Danial Katoozian +2 more
doaj +1 more source
Advances in Electrical and Electronic Engineering, 2012 This article describes the modelling and implementation of two different variants of direct frequency synthesizer, and evaluation of the performance of the finished design, in terms of memory and speed efficiency.
Daniel Kekrt +3 more
doaj +1 more source
Implementation and testing of a FSK demodulator
Revista Elektrón, 2021 This work describes the implementation and testing of a FSK demodulator, within the framework of a modem re-engineering for navy communications. It was developed over a Spartan 6 XCSLX25 FPGA with its code in VHDL.
Leandro José Ferrari +3 more
doaj +1 more source