Results 51 to 60 of about 384,291 (294)
Synthesis of parallel adders from if-decision diagrams
Системный анализ и прикладная информатика, 2020 Addition is one of the timing critical operations in most of modern processing units. For decades, extensive research has been done devoted to designing higher speed and less complex adder architectures, and to developing advanced adder implementation ...
A. A. Prihozhy
doaj +1 more source
Predictive control using an FPGA with application to aircraft control [PDF]
, 2013 Alternative and more efficient computational methods can extend the applicability of MPC to systems with tight real-time requirements. This paper presents a “system-on-a-chip” MPC system, implemented on a field programmable gate array (FPGA), consisting ...
Constantinides, GA +5 more
core +1 more source
Empowering parallel computing with field programmable gate arrays [PDF]
, 2020 After more than 30 years, reconfigurable computing has grown from a concept to a mature field of science and technology. The cornerstone of this evolution is the field programmable gate array, a building block enabling the configuration of a custom hardware ...
D'Hollander, Erik
core +2 more sources
2010 International Conference on Field Programmable Logic and Applications, 2010 Integer addition is a universal building block, and applications such as quad-precision floating-point or elliptic curve cryptography now demand precisions well beyond 64 bits. This study explores the trade-offs between size, latency and frequency for pipelined large-precision adders on FPGA.
de Dinechin, Florent +2 more
openaire +3 more sources
FPGA Verification Module [PDF]
Annals of Computer Science and Information Systems, 2014 This paper addresses verification and debugging tool for development of FPGA modules. Proposed tool is developed for educational purposes in teaching students on Digital Design and VHDL programming language. Main goal of the debugging module is to get/set signal values while the FPGA board is running the module of interest.
Zeljko Hocenski, Ivan Aleksi
openaire +5 more sources
Novel hybrid strong and weak PUF design based on FPGA
网络与信息安全学报, 2021 Physically unclonable function (PUF) can produce intrinsic keys with characteristics of randomness, uniqueness and tamper-proof by exploiting the process deviations which can not be avoided in the chip manufacturing process.
LIAN Jiana +2 more
doaj +1 more source
FPGA-Based Tracklet Approach to Level-1 Track Finding at CMS for the HL-LHC [PDF]
, 2017 During the High Luminosity LHC, the CMS detector will need charged particle tracking at the hardware trigger level to maintain a manageable trigger rate and achieve its physics goals.
Bartz, Edward +15 more
core +1 more source
Caffeinated FPGAs: FPGA framework For Convolutional Neural Networks [PDF]
2016 International Conference on Field-Programmable Technology (FPT), 2016 Convolutional Neural Networks (CNNs) have gained significant traction in the field of machine learning, particularly due to their high accuracy in visual recognition. Recent works have pushed the performance of GPU implementations of CNNs to significantly improve their classification and training times.
Graham W. Taylor +5 more
openaire +2 more sources
Hardware acceleration of number theoretic transform for zk‐SNARK
Engineering Reports, EarlyView., 2023 An FPGA‐based hardware accelerator with a multi‐level pipeline is designed to support the large‐bitwidth and large‐scale NTT tasks in zk‐SNARK. It can be flexibly scaled to different scales of FPGAs and has been equipped in the heterogeneous acceleration system with the help of HLS and OpenCL.
Haixu Zhao +6 more
wiley +1 more source
Mix and Match: A Novel FPGA-Centric Deep Neural Network Quantization Framework [PDF]
International Symposium on High-Performance Computer Architecture, 2020 Deep Neural Networks (DNNs) have achieved extraordinary performance in various application domains. To support diverse DNN models, efficient implementations of DNN inference on edge-computing platforms, e.g., ASICs, FPGAs, and embedded systems, are ...
Sung-En Chang +7 more
semanticscholar +1 more source