Results 61 to 70 of about 165,505 (261)
Unsupervised Recycled FPGA Detection Using Symmetry Analysis [PDF]
arXiv, 2023 Recently, recycled field-programmable gate arrays (FPGAs) pose a significant hardware security problem due to the proliferation of the semiconductor supply chain. Ring oscillator (RO) based frequency analyzing technique is one of the popular methods, where most studies used the known fresh FPGAs (KFFs) in machine learning-based detection, which is not ...
arxiv
Design of multi-channel data acquisition system based on FPGA in rotating environment
Dianzi Jishu Yingyong, 2019 In order to meet the real-time and high-precision multi-channel acquisition requirements of a large rotating machinery equipment in the monitoring process, this paper proposes a design scheme of multi-channel vibration signal acquisition and detection ...
Yi Zhiqiang, Han Bin, Xian Long, Li Wei
doaj +1 more source
Optimization and FPGA implementation of RS coding algorithm
Dianzi Jishu Yingyong, 2020 Aiming at the problems of large amount of computation and high complexity of multiplication of Galois Field(GF) in the common RS coding algorithm, the RS coding module is optimized and the multiplier factor is obtained.
Li Jinming, Liu Mengxin, Cheng Naipeng
doaj +1 more source
Efficient and Realistic Brain Simulation: A Review and Design Guide for Memristor‐Based Approaches
Advanced Materials Technologies, EarlyView.Memristor‐based emulation of Hodgkin‐Huxley neuron models is investigated, by defining the ideal device characteristics needed for accurate ion‐channel representation and reviewing existing works targeting memristive replication of biological realistic neural behavior.
Lennart Paul Liong Landsmeer +5 more
wiley +1 more source
FPGA Verification Module [PDF]
Annals of Computer Science and Information Systems, 2014 This paper addresses verification and debugging tool for development of FPGA modules. Proposed tool is developed for educational purposes in teaching students on Digital Design and VHDL programming language. Main goal of the debugging module is to get/set signal values while the FPGA board is running the module of interest.
Zeljko Hocenski, Ivan Aleksi
openaire +3 more sources
A Survey of System Architectures and Techniques for FPGA Virtualization [PDF]
arXiv, 2020 FPGA accelerators are gaining increasing attention in both cloud and edge computing because of their hardware flexibility, high computational throughput, and low power consumption. However, the design flow of FPGAs often requires specific knowledge of the underlying hardware, which hinders the wide adoption of FPGAs by application developers. Therefore,
arxiv
Scientific ReportsIn the field of Brain Machine Interface (BMI), the process of translating motor intention into a machine command is denoted as decoding. However, despite recent advancements, decoding remains a formidable challenge within BMI.
Danial Katoozian +2 more
doaj +1 more source
Development of portable orthogonal lock-in amplifier based on FPGA
Dianzi Jishu Yingyong, 2018 A portable orthogonal phase-locked amplifier for weak signal detection has been developed based on FPGA. First,the signal processing module receives the signal,does variable gain amplification on the signal and puts it through the power frequency noise ...
Xie Guihui +4 more
doaj +1 more source
High Throughput Implementation of the Keccak Hash Function Using the Nios-II Processor
Technologies, 2020 Presently, cryptographic hash functions play a critical role in many applications, such as digital signature systems, security communications, protocols, and network security infrastructures.
Argyrios Sideris +2 more
doaj +1 more source
Technologies for implementing of artificial intelligence as a service based on hardware accelerators
Авіаційно-космічна техніка та технологія, 2022 The subject of study in this article is modern technologies, tools and methods of building AI systems as a service using FPGA as a platform. The goal is to analyze modern technologies and tools used to develop FPGA-based projects for systems that ...
Artem Perepelitsyn +3 more
doaj +1 more source