Results 61 to 70 of about 246,901 (236)

RaPro: A Novel 5G Rapid Prototyping System Architecture

open access: yes, 2017
We propose a novel fifth-generation (5G) rapid prototyping (RaPro) system architecture by combining FPGA-privileged modules from a software defined radio (or FPGA-coprocessor) and high-level programming language for advanced algorithms from multi-core ...
Gao, Feifei   +6 more
core   +1 more source

Predictive control using an FPGA with application to aircraft control [PDF]

open access: yes, 2013
Alternative and more efficient computational methods can extend the applicability of MPC to systems with tight real-time requirements. This paper presents a “system-on-a-chip” MPC system, implemented on a field programmable gate array (FPGA), consisting ...
Constantinides, GA   +5 more
core   +1 more source

ADC Emulation on FPGA [PDF]

open access: gold, 2023
Huma Tabassum   +2 more
openalex   +1 more source

Caffeinated FPGAs: FPGA framework For Convolutional Neural Networks [PDF]

open access: yes2016 International Conference on Field-Programmable Technology (FPT), 2016
Convolutional Neural Networks (CNNs) have gained significant traction in the field of machine learning, particularly due to their high accuracy in visual recognition. Recent works have pushed the performance of GPU implementations of CNNs to significantly improve their classification and training times.
DiCecco, Roberto   +5 more
openaire   +2 more sources

Optimization of multi-gigabit transceivers for high speed data communication links in HEP Experiments

open access: yes, 2019
The scheme of the data acquisition (DAQ) architecture in High Energy Physics (HEP) experiments consist of data transport from the front-end electronics (FEE) of the online detectors to the readout units (RU), which perform online processing of the data ...
Das, Tushar Kanti   +3 more
core   +1 more source

Performance comparison of single-precision SPICE Model-Evaluation on FPGA, GPU, Cell, and multi-core processors [PDF]

open access: yes, 2009
Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor organizations for data-parallel, floating-point computation in SPICE model-
DeHon, André, Kapre, Nachiket
core   +2 more sources

Accelerating Binary String Comparisons with a Scalable, Streaming-Based System Architecture Based on FPGAs

open access: yesAlgorithms, 2020
This paper is concerned with Field Programmable Gate Arrays (FPGA)-based systems for energy-efficient high-throughput string comparison. Modern applications which involve comparisons across large data sets—such as large sequence sets in molecular ...
Sarah Pilz   +5 more
doaj   +1 more source

Implementation and testing of a FSK demodulator

open access: yesRevista Elektrón, 2021
This work describes the implementation and testing of a FSK demodulator, within the framework of a modem re-engineering for navy communications. It was developed over a Spartan 6 XCSLX25 FPGA with its code in VHDL.
Leandro José Ferrari   +3 more
doaj   +1 more source

A Survey of Methods For Analyzing and Improving GPU Energy Efficiency

open access: yes, 2014
Recent years have witnessed a phenomenal growth in the computational capabilities and applications of GPUs. However, this trend has also led to dramatic increase in their power consumption.
Mittal, Sparsh, Vetter, Jeffrey S.
core   +1 more source

Performance Investigation of Peak Shrinking and Interpolating the PAPR Reduction Technique for LTE-Advance and 5G Signals

open access: yesInformation, 2019
Orthogonal frequency division multiplexing (OFDM) has become an indispensable part of waveform generation in wideband digital communication since its first appearance in digital audio broadcasting (DAB) in Europe in 1980s, and it is indeed in use. As has
Somayeh Mohammady   +3 more
doaj   +1 more source

Home - About - Disclaimer - Privacy