Results 61 to 70 of about 384,291 (294)

Analysis of a novel FPGA-based system for filtering audio signals using a finite impulse response filters [PDF]

open access: yesInternational Journal of Electronics and Telecommunications, 2022
In this article, an analysis of an innovative system for filtering signals in the audible range (16 Hz - 20 kHz) on programmable logic devices using a filters with a finite impulse response, is presented. Mentioned system was neat combination of software
Adrian Lipowski   +2 more
doaj   +1 more source

Análisis de desempeño de capas de CNN para arquitecturas heterog´eneas basadas en FPGAs usando HLS

open access: yesIngeniería, 2020
Contexto: Las redes neuronales convolucionales (CNNs) son actualmente utilizadas en una amplia gama de aplicaciones de inteligencia artificial. En muchos casos, dichas aplicaciones requieren la ejecución de las redes en tiempo real en dispositivos ...
Mateo Guerra Londono   +4 more
doaj   +1 more source

Urukul – Open-source Frequency Synthesizer Module for Quantum Physics [PDF]

open access: yesInternational Journal of Electronics and Telecommunications, 2022
We describe Urukul, a frequency synthesizer based on direct digital synthesis (DDS), optimized for wave generate control in atomic, molecular and optical (AMO) physics experiments.
Grzegorz Kasprowicz   +8 more
doaj   +1 more source

Fast, Accurate and Detailed NoC Simulations [PDF]

open access: yes, 2007
Network-on-Chip (NoC) architectures have a wide variety of parameters that can be adapted to the designer's requirements. Fast exploration of this parameter space is only possible at a high-level and several methods have been proposed.
Hölzenspies, P.K.F.   +2 more
core   +2 more sources

A Survey of FPGA-Based Robotic Computing [PDF]

open access: yesIEEE Circuits and Systems Magazine, 2020
Recent researches on robotics have shown significant improvement, spanning from algorithms, mechanics to hardware architectures. Robotics, including manipulators, legged robots, drones, and autonomous vehicles, are now widely applied in diverse scenarios.
Zishen Wan   +7 more
semanticscholar   +1 more source

High Throughput Implementation of the Keccak Hash Function Using the Nios-II Processor

open access: yesTechnologies, 2020
Presently, cryptographic hash functions play a critical role in many applications, such as digital signature systems, security communications, protocols, and network security infrastructures.
Argyrios Sideris   +2 more
doaj   +1 more source

Using an FPGA for Fast Bit Accurate SoC Simulation [PDF]

open access: yes, 2007
In this paper we describe a sequential simulation method to simulate large parallel homo- and heterogeneous systems on a single FPGA. The method is applicable for parallel systems were lengthy cycle and bit accurate simulations are required.
Hölzenspies, P.K.F.   +2 more
core   +2 more sources

FastFlow targeting FPGAs

open access: yes2023 31st Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP), 2023
Writing good code for FPGA is a challenge “per se”, but also running already existing and optimized FPGA kernels often requires writing specific “host side” code and some target hardware knowledge to achieve good performances. In this work, we describe a FastFlow extension supporting seamless off loading of tasks to FPGA, once an FPGA kernel is ...
Danelutto, Marco   +4 more
openaire   +2 more sources

Toolflows for Mapping Convolutional Neural Networks on FPGAs: A Survey and Future Directions [PDF]

open access: yes, 2018
In the past decade, Convolutional Neural Networks (CNNs) have demonstrated state-of-the-art performance in various Artificial Intelligence tasks. To accelerate the experimentation and development of CNNs, several software frameworks have been released ...
Bouganis, Christos-Savvas   +2 more
core   +2 more sources

Comparing Energy Efficiency of CPU, GPU and FPGA Implementations for Vision Kernels [PDF]

open access: yesInternational Conference on Embedded Software and Systems, 2019
Developing high performance embedded vision applications requires balancing run-time performance with energy constraints. Given the mix of hardware accelerators that exist for embedded computer vision (e.g.
Murad Qasaimeh   +5 more
semanticscholar   +1 more source

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