Speech Recognition on an FPGA Using Discrete and Continuous Hidden Markov Models [PDF]
, 2002 Speech recognition is a computationally demanding task, particularly the stage which uses Viterbi decoding for converting pre-processed speech data into words or sub-word units.
Melnikoff, Stephen Jonathan +2 more
core
Transformations of High-Level Synthesis Codes for High-Performance Computing
, 2019 Specialized hardware architectures promise a major step in performance and energy efficiency over the traditional load/store devices currently employed in large scale computing systems.
Besta, Maciej +3 more
core +1 more source
Radiofrequency generator and programmer of pulse sequences for PMR relaxometer
Известия высших учебных заведений: Проблемы энергетики, 2020 Described the generator of resonance radiofrequency with the step of change 50 kHz in the range 520 MHz and pulse programmer of the pulse sequences for relaxometer of proton magnetic resonance (PMR).
Tran Van Tung, R. S. Kashaev
doaj +1 more source
A Review on Quality Assurance in Aluminium Die Casting through Deep Learning-Based Defect Detection [PDF]
E3S Web of ConferencesThe materials constitute an important segment of engineering practice and their appropriate choice forms the utmost part of engineering practice. The heterogeneity in engineering material quality and composition induced during manufacturing stages has ...
Bhat Varun +3 more
doaj +1 more source
FPGA-accelerated mode decomposition for multimode fiber-based communication
Light: Advanced ManufacturingMode division multiplexing (MDM) using multimode fibers (MMFs) is key to meeting the demand for higher data rates and advancing internet technologies.
Qian Zhang, Yuedi Zhang, Juergen Czarske
doaj +1 more source
Synthetic retina for AER systems development [PDF]
, 2009 Neuromorphic engineering tries to mimic biology in information processing. Address-Event Representation (AER) is a neuromorphic communication protocol for spiking neurons between different layers.
Civit Balcells, Antón +4 more
core
System of the time-code terminal based on MCU and FPGA(基于单片机及FPGA的时码终端系统)
Zhejiang Daxue xuebao. Lixue ban, 2003 本文详细叙述了基于FPGA及单片机,实现时码终端系统的设计方法.该系统可用于对国际通用时间格式码IRIG-B码(简称B码)的解调,以及产生各种采样、同步频率信号,也可作为其它系统的时基和采样、同步信号的基准.
ZHAOYun-feng(赵云峰) +1 more
doaj +1 more source
Método Iterativo de Representação Esparsa Implementado em FPGA para Aplicação em Calorimetria [PDF]
, 2020 Tiago Teixeira +3 more
openalex +1 more source
4K-supporting ARINC818 video transporting and verifying system
Dianzi Jishu YingyongIn demand of 4K or higher resolution video transporting in cockpit in the future, a common system related to ARINC818 video codec is referred and verified through DP video port in this article.
Gao Weilin, Yang Bingwei, Xin Chunming
doaj +1 more source
Real-time network communication using 8B10B coding for mechatronics control
Nihon Kikai Gakkai ronbunshuHigh-speed and high-precision actuator control is required for industrial manufacturing equipment. In such systems, the control operation cycle needs to be shortened to 100 μs or less. Recently, the quantity of sensors and actuators is increasing because
Kazushi YAMASHINA +4 more
doaj +1 more source