Results 41 to 50 of about 289,843 (203)
An Asynchronous FPGA Block with Its Tech-Mapping Algorithm Dedicated to Security Applications
International Journal of Reconfigurable Computing, 2013 This paper presents an FPGA tech-mapping algorithm dedicated to security applications. The objective is to implement—on a full-custom asynchronous FPGA—secured functions that need to be robust against side-channel attacks (SCAs).
Taha Beyrouthy, Laurent Fesquet
doaj +1 more source
Neuromorphic Near‐Sensor and In‐Sensor Computing Enabled by Next‐Generation Material‐Based Sensors
Advanced Science, EarlyView.This Review presents a structural framework that classifies neuromorphic sensing into near‐sensor and in‐sensor architectures, clarifying physical coupling between sensing and computation. The framework connects neural and synaptic device functions with recent advances in optical, mechanical, and chemical sensing, compares energy consumption and ...
Su Yeon Jung +7 more
wiley +1 more source
A prototype parallel multi-FPGA accelerator for SPICE CMOS model evaluation
, 2011 Due to ever increasing complexity of circuits, EDA tools and algorithms are demanding more computational power. This made transistor-level simulation a growing bottleneck in the circuit development process.
Maache, Ahmed
core +1 more source
Photonic‐Enabled Energy‐Efficient Transparent Neuromorphic Computing Devices: A Review
Advanced Science, EarlyView.Transparent photonic neuromorphic computing devices merge optics and brain‐inspired computing to overcome von Neumann bottlenecks with ultrafast, low‐energy processing. By exploiting transparent oxides, 2D materials, phase‐change materials, and hybrid heterostructures, these platforms enable photonic synapses, memory, and logic for see‐through edge ...
Shuvaraj Ghosh +8 more
wiley +1 more source
FPGA Implementation of Fuzzy Interpreted Petri Net
IEEE Access, 2020 The paper introduces new implementation methods of the fuzzy interpreted Petri net (FIPN) on FPGAs. The realization of FIPN is based on fast array multipliers and multipliers utilizing DSP blocks available on FPGA systems. The paper contains descriptions
Zbigniew Hajduk, Jolanta Wojtowicz
doaj +1 more source
FPGA Acceleration of a Composite Kernel SVM for Hyperspectral Image Classification
IEEE Access, 2023 Hyperspectral image classification is one of the most important techniques for analyzing hyperspectral image that have hundreds of spectrum luminance values of near-infrared to visible light.
Kento Tajiri, Tsutomu Maruyama
doaj +1 more source
Advanced Science, EarlyView.By leveraging strong antiferromagnetic coupling, radiation‐tolerant synthetic antiferromagnetic synaptic devices are developed. Their intrinsic nonlinearity emulates neuronal activation, while linear and symmetric conductance modulation mimics synaptic plasticity.
Mingxu Song +5 more
wiley +1 more source
CPAmap: On the Complexity of Secure FPGA Virtualization, Multi-Tenancy, and Physical Design
Transactions on Cryptographic Hardware and Embedded Systems, 2020 With virtualized Field Programmable Gate Arrays (FPGAs) on the verge of being deployed to the cloud computing domain, there is a rising interest in resolving recently identified security issues.
Jonas Krautter +2 more
doaj +1 more source
A Soft Coprocessor Approach for Developing Image and Video Processing Applications on FPGAs
Journal of Imaging, 2022 Developing Field Programmable Gate Array (FPGA)-based applications is typically a slow and multi-skilled task. Research in tools to support application development has gradually reached a higher level.
Tiantai Deng +3 more
doaj +1 more source
Advanced Science, EarlyView.The concept of high‐dimensional EM modulation using the STMA for physical layer secure communication is illustrated in figure. The STMA consists of a series of programmable unit cells, with 1‐bit reconfigurable phase states (0/π). The STMA is excited by a monochromatic continuous wave (CW) at frequency fc and controlled by a field‐programmable gate ...
Xinyu Fang +6 more
wiley +1 more source