FPGA Implementations of Feed Forward Neural Network by using Floating Point Hardware Accelerators
This paper documents the research towards the analysis of different solutions to implement a Neural Network architecture on a FPGA design by using floating point accelerators.
Gabriele-Maria Lozito +3 more
doaj +1 more source
A C++-embedded Domain-Specific Language for programming the MORA soft processor array [PDF]
MORA is a novel platform for high-level FPGA programming of streaming vector and matrix operations, aimed at multimedia applications. It consists of soft array of pipelined low-complexity SIMD processors-in-memory (PIM).
Purohit, S. +7 more
core +1 more source
A diagnostic method for reconfigurable intelligent surfaces (RIS) based on non‐uniform space‐time‐coding modulation is presented. Fault localization is achieved via amplitude‐only spectral measurements, eliminating the need for complex signal processing. A one‐to‐one mapping between harmonic components and RIS elements enables accurate detection.
Xiao Qing Chen +8 more
wiley +1 more source
An Integrated Software Testing Framework for FPGA-Based Controllers in Nuclear Power Plants
Field-programmable gate arrays (FPGAs) have received much attention from the nuclear industry as an alternative platform to programmable logic controllers for digital instrumentation and control.
Jaeyeob Kim +4 more
doaj +1 more source
A General and Efficient Framework for the Rapid Design of Miniaturized, Wideband, and High‐Bit RIS
A general and efficient framework is proposed for the rapid design of high‐performance reconfigurable intelligent surfaces (RISs). This framework integrates advanced antenna design techniques and incorporates various load types, quantities, and values to achieve the design of high‐performance RISs.
Jun Wei Zhang +14 more
wiley +1 more source
An FPGA-Based Electronic Cochlea
A module generator which can produce an FPGA-based implementation of an electronic cochlea filter with arbitrary precision is presented. Although hardware implementations of electronic cochlea models have traditionally used analog VLSI as the ...
M. P. Leong +2 more
doaj +1 more source
An area-efficient 2-D convolution implementation on FPGA for space applications [PDF]
The 2-D Convolution is an algorithm widely used in image and video processing. Although its computation is simple, its implementation requires a high computational power and an intensive use of memory.
Stefano Di Carlo +11 more
core +1 more source
Terahertz Channel Modeling, Estimation and Localization in RIS‐Assisted Systems
Reconfigurable intelligent surfaces have become a recent intensive research focus. Based on practical applications, channel strategies for RIS‐assisted terahertz wireless communication systems are categorized into three different types: channel modeling, channel estimation, and channel localization.
Hongjing Wang +9 more
wiley +1 more source
Multidimensional Costas Arrays and Their Enumeration Using GPUs and FPGAs
The enumeration of two-dimensional Costas arrays is a problem with factorial time complexity and has been solved for sizes up to 29 using computer clusters.
Rafael A. Arce-Nazario +1 more
doaj +1 more source
Flexible FPGA-Based Controller Architecture for Five-fingered Dexterous Robot Hand with Effective Impedance Control [PDF]
Several practical issues associated with achieving effective impedance performance in the finger joint space and stable grasping on a five-fingered dexterous hand are investigated in this work.
Z. X. Xue +17 more
core +1 more source

