Results 11 to 20 of about 1,050,120 (328)
Spiker: an FPGA-optimized Hardware accelerator for Spiking Neural Networks [PDF]
IEEE Computer Society Annual Symposium on VLSI, 2022 Spiking Neural Networks (SNN) are an emerging type of biologically plausible and efficient Artificial Neural Network (ANN). This work presents the development of a hardware accelerator for a SNN for high-performance inference, targeting a Xilinx Artix-7 ...
Alessio Carpegna +2 more
semanticscholar +1 more source
Consumer Document Analytical Accelerator Hardware
IEEE Access, 2023 Document scanning devices are used for visual character recognition, followed by text analytics in the software. Often such character extraction is insecure, and any third party can manipulate the information.
Aswani Radhakrishnan +2 more
doaj +1 more source
IEEE Access, 2023 This paper proposes both software and hardware mechanisms based on the near-memory processing (NMP) accelerator to improve the linked list traversal of the in-memory caching.
Minkwan Kee, Chiwon Han, Gi-Ho Park
doaj +1 more source
SeGraM: a universal hardware accelerator for genomic sequence-to-graph and sequence-to-sequence mapping [PDF]
International Symposium on Computer Architecture, 2022 A critical step of genome sequence analysis is the mapping of sequenced DNA fragments (i.e., reads) collected from an individual to a known linear reference genome sequence (i.e., sequence-to-sequence mapping).
Damla Senol Cali +17 more
semanticscholar +1 more source
IEEE Access, 2022 Polynomial multiplication is one of the heaviest operations for a lattice-based public key algorithm in Post-Quantum Cryptography (PQC). Many studies have been done to accelerate polynomial multiplication with newly developed hardware accelerators or ...
Jong-Yeon Park +4 more
doaj +1 more source
CODEBench: A Neural Architecture and Hardware Accelerator Co-Design Framework [PDF]
ACM Transactions on Embedded Computing Systems, 2022 Recently, automated co-design of machine learning (ML) models and accelerator architectures has attracted significant attention from both the industry and academia.
Shikhar Tuli +3 more
semanticscholar +1 more source
Hardware Accelerator and Neural Network Co-Optimization for Ultra-Low-Power Audio Processing Devices [PDF]
Euromicro Symposium on Digital Systems Design, 2022 The increasing spread of artificial neural networks does not stop at ultralow-power edge devices. However, these very often have high computational demand and require specialized hardware accelerators to ensure the design meets power and performance ...
Christoph Gerum +5 more
semanticscholar +1 more source
An OpenCL-Based FPGA Accelerator for Faster R-CNN
Entropy, 2022 In recent years, convolutional neural network (CNN)-based object detection algorithms have made breakthroughs, and much of the research corresponds to hardware accelerator designs. Although many previous works have proposed efficient FPGA designs for one-
Jianjing An +3 more
doaj +1 more source
BASALISC: Programmable Hardware Accelerator for BGV Fully Homomorphic Encryption [PDF]
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022 Fully Homomorphic Encryption (FHE) allows for secure computation on encrypted data. Unfortunately, huge memory size, computational cost and bandwidth requirements limit its practicality.
Robin Geelen +12 more
semanticscholar +1 more source
CORDIC Hardware Acceleration Using DMA-Based ISA Extension
Journal of Low Power Electronics and Applications, 2022 The use of RISC-based embedded processors aimed at low cost and low power is becoming an increasingly popular ecosystem for both hardware and software development. High-performance yet low-power embedded processors may be attained via the use of hardware
Erez Manor +2 more
doaj +1 more source