Results 1 to 10 of about 3,513 (147)
Design of Hardware Accelerators for Optimized and Quantized Neural Networks to Detect Atrial Fibrillation in Patch ECG Device with RISC-V [PDF]
Sensors, 2023 Atrial Fibrillation (AF) is one of the most common heart arrhythmias. It is known to cause up to 15% of all strokes. In current times, modern detection systems for arrhythmias, such as single-use patch electrocardiogram (ECG) devices, have to be energy ...
Ingo Hoyer +6 more
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Hardware Accelerators for Cardiovascular Signal Processing: A System-on-Chip Perspective [PDF]
MicromachinesThis study presents a comprehensive systematic analysis, investigating hardware accelerators specifically designed for real-time cardiovascular signal processing, focusing mainly on Electrocardiogram (ECG), Photoplethysmogram (PPG), and blood pressure ...
Rami Hariri +4 more
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Graphics Accelerators: A Review
NTU Journal of Engineering and Technology, 2023 The spreadability of large and diverse computer graphics applications, highly powerful and diversified programmable hardware platforms, rapid advances in their programing techniques have all permitted design different hardware accelerators for many ...
Layla Jamal Hussein +2 more
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IEEE Access, 2022 Polynomial multiplication is one of the heaviest operations for a lattice-based public key algorithm in Post-Quantum Cryptography (PQC). Many studies have been done to accelerate polynomial multiplication with newly developed hardware accelerators or ...
Jong-Yeon Park +4 more
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A General Framework for Accelerator Management Based on ISA Extension
IEEE Access, 2022 Thanks to the promised improvements in performance and energy efficiency, hardware accelerators are taking momentum in many computing contexts, both in terms of variety and relative weight in the silicon area of many chips.
Elham Cheshmikhani +3 more
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MXQuery with Hardware Acceleration [PDF]
2012 IEEE 28th International Conference on Data Engineering, 2012 We demonstrate MXQuery/H, a modified version of MXQuery that uses hardware acceleration to speed up XML processing. The main goal of this demonstration is to give an interactive example of hardware/software co-design and show how system performance and energy efficiency can be improved by off-loading tasks to FPGA hardware.
Fischer, Peter M., Teubner, Jens
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Hardware-Accelerated Simulated Radiography [PDF]
IEEE Visualization 2005 - (VIS'05), 2006 We present the application of hardware accelerated volume rendering algorithms to the simulation of radiographs as an aid to scientists designing experiments, validating simulation codes, and understanding experimental data. The techniques presented take advantage of 32-bit floating point texture capabilities to obtain solutions to the radiative ...
Laney, D. +5 more
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Applied Sciences, 2022 The remarkable results of applying machine learning algorithms to complex tasks are well known. They open wide opportunities in natural language processing, image recognition, and predictive analysis.
Vladislav Shatravin +2 more
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Efficient Hardware Architectures for Accelerating Deep Neural Networks: Survey
IEEE Access, 2022 In the modern-day era of technology, a paradigm shift has been witnessed in the areas involving applications of Artificial Intelligence (AI), Machine Learning (ML), and Deep Learning (DL).
Pudi Dhilleswararao +3 more
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Sensors, 2022 Deep neural networks have been deployed in various hardware accelerators, such as graph process units (GPUs), field-program gate arrays (FPGAs), and application specific integrated circuit (ASIC) chips.
Liang Chang, Xin Zhao, Jun Zhou
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