Results 31 to 40 of about 46,646 (266)
A Real-Time Naive Bayes Classifier Accelerator on FPGA
In this paper, we propose a real-time hardware naive Bayes classifier (NBC) which is implemented on field programmable gate array (FPGA). We first use logarithm transformation based look-up table and float-to-fixed point process to simplify the ...
Zhen Xue, Jizeng Wei, Wei Guo
doaj +1 more source
Taking advantage of hybrid systems for sparse direct solvers via task-based runtimes [PDF]
The ongoing hardware evolution exhibits an escalation in the number, as well as in the heterogeneity, of computing resources. The pressure to maintain reasonable levels of performance and portability forces application developers to leave the traditional
Bosilca, George +4 more
core +6 more sources
Hardware Accelerators for Elliptic Curve Cryptography [PDF]
In this paper we explore different hardware accelerators for cryptography based on elliptic curves. Furthermore, we present a hierarchical multiprocessor system-on-chip (MPSoC) platform that can be used for fast integration and evaluation of novel ...
C. Puttmann +3 more
doaj
A new design approach of hardware implementation through natural language entry
OpenAI's ChatGPT (GPT‐4) ushers in a superior mode of computer interaction through natural language dialogues. Notably, it generates not only engaging dialogues but also codes aligned to queries and requirements.
Kaiyuan Yang +3 more
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The usage of RISC-based embedded processors, aimed at low cost and low power, is becoming an increasingly popular ecosystem for both hardware and software development.
Erez Manor, Shlomo Greenberg
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AbstractWith Moore’s law and Dennard’s scaling no longer fueling the improvement in computing performance, new avenues for increasing performance are needed. Hardware acceleration is one avenue where many researchers and industrial parties are working and investing.
openaire +1 more source
HPC Accelerators with 3D Memory [PDF]
Artículo invitado, publicado en las actas del congreso por IEEE Society Press. Páginas 320 a 328. ISBN: 978-1-5090-3593-9.DOI 10.1109/CSE-EUC-DCABES-2016.203After a decade evolving in the High Performance Computing arena, GPU-equipped supercomputers have
Ujaldon-Martinez, Manuel
core +1 more source
A Novel Two-Level Protection Scheme against Hardware Trojans on a Reconfigurable CNN Accelerator
With the boom in artificial intelligence (AI), numerous reconfigurable convolution neural network (CNN) accelerators have emerged within both industry and academia, aiming to enhance AI computing capabilities.
Zichu Liu +3 more
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Photonic matrix multiplication lights up photonic accelerator and beyond
This review summarizes the advances of photonic accelerators from the viewpoint of photonic matrix multiplication, providing a guidance for all-optical or optoelectronic-hybrid AI hardware chip system.
Hailong Zhou +11 more
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Convolutional neural networks (CNNs) have demonstrated significant superiority in modern artificial intelligence (AI) applications. To accelerate the inference process of CNNs, reconfigurable CNN accelerators that support diverse networks are widely ...
Jia Hou +3 more
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