A Flexible and Parallel Hardware Accelerator for Forward and Inverse Number Theoretic Transform
IEEE AccessThis paper demonstrates an efficient and flexible hardware accelerator for polynomial multiplication using number theoretic transform (NTT). The proposed architecture considers flexibility and performance requirements at the same time.
Muhammad Rashid +3 more
doaj +1 more source
Contributions to Synchronous Generation of Sinusoidal Voltages with Controllable Phase Shifts [PDF]
Journal of Electrical and Electronics Engineering, 2020 The power system simulator generates the electrical signals for complex protection relay testing. This paper presents a method for generating these electrical signals and its associated hardware architecture, designed to implement a power system ...
PURCARU Dorina +2 more
doaj
Projeto unificado de componentes em hardware e software para sistemas embarcados [PDF]
, 2013 Dissertação (mestrado) - Universidade Federal de Santa Catarina, Centro Tecnológico, Programa de Pós-Graduação em Ciência da Computação, Florianópolis, 2013.O crescente aumento na complexidade dos sistemas embarcados está ocasionando uma migração para ...
Mück, Tiago Rogério
core
MORA - an architecture and programming model for a resource efficient coarse grained reconfigurable processor [PDF]
, 2009 This paper presents an architecture and implementation details for MORA, a novel coarse grained reconfigurable processor for accelerating media processing applications. The MORA architecture involves a 2-D array of several such processors, to deliver low
Purohit, S. +7 more
core +1 more source
Nanorobot Hardware Architecture for Medical Defense
Sensors, 2008 This work presents a new approach with details on the integrated platform and hardware architecture for nanorobots application in epidemic control, which should enable real time in vivo prognosis of biohazard infection.
Luiz C. Kretly +3 more
doaj
Intelligent and Converged Networks, 2022 The demanding objectives for the future sixth generation (6G) of wireless communication networks have spurred recent research efforts on novel materials and radio-frequency front-end architectures for wireless connectivity, as well as revolutionary ...
Mengnan Jian +6 more
doaj +1 more source
A Hardware Architecture for Native Execution of Python Bytecode on FPGA: A Proof-of-Concept
IEEE AccessThis paper presents a proof-of-concept implementation of a Python virtual machine executed directly on an FPGA using a dedicated, synthesizable microarchitecture described in Verilog.
Gustavo C. G. Melo +3 more
doaj +1 more source
A Survey on Swarm Robotics for Area Coverage Problem
Algorithms, 2023 The area coverage problem solution is one of the vital research areas which can benefit from swarm robotics. The greatest challenge to the swarm robotics system is to complete the task of covering an area effectively.
Dena Kadhim Muhsen +2 more
doaj +1 more source
Analysis and Hardware Architecture on FPGA of a Robust Audio Fingerprinting Method Using SSM
Technologies, 2022 The significant volume of sharing of digital media has recently increased due to the pandemic, raising the number of unauthorized uses of these media, such as emerging unauthorized copies, forgery, the lack of copyright, and electronic fraud, among ...
Ignacio Algredo-Badillo +5 more
doaj +1 more source
Acbuilder: a tool for hardware architecture security evaluation
, 2016 In this work we propose to enable the security analysis of hardware architecture independently of its physical implementation. This will help to discover vulnerabilities and flaws in a broad range of architectures, and to identify problems before the ...
Kawakami, Henrique +8 more
core +1 more source