Results 11 to 20 of about 4,696,608 (299)
XTR Implementation on Reconfigurable Hardware [PDF]
, 2004 Recently, Lenstra and Verheul proposed an efficient cryptosystem called XTR. This system represents elements of F,6 with order dividing p(2) - p + 1 by their trace over F-p2. Compared with the usual representation, this one achieves a ratio of three between security size and manipulated data.
Peeters, Emmanuel, Nève, M., Ciet, M.
openaire +3 more sources
Simple Hardware Implementation of Motion Estimation Algorithms [PDF]
ACI Avances en Ciencias e Ingenierías, 2019 We present in the following work a hardware implementation of the two principal optical flow methods. The work is based on the methods developed by Lucas & Kanade, and Horn & Schunck.
Juan Romero +4 more
doaj +2 more sources
A Side-Channel Protected and High-Performance Hardware Implementation for EdDSA25519
IEEE AccessThis paper presents a high-performance and secure hardware implementation of the Edwards-Curve Digital Signature Algorithm (EdDSA25519). Using the fixed-base signed multi-comb and the k-ary algorithms for scalar multiplication, the proposed design ...
Pablo Navarro-Torrero +3 more
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A hardware implementation of 6dof quadcopter matlab/simulink controller algorithm to an autopilot [PDF]
, 2021 This paper presents a hardware implementation of Control algorithm for 6DOF Quadcopter developed on MATLAB/SIMULINK to an autopilot Microcontroller (PIXHAWK) using MATLAB/SIMULINK Embedded Coder.
Amar, Bousbaine +2 more
core +1 more source
Implementation of SM3 algorithm based on SoPC component
网络与信息安全学报, 2017 Firstly the realization of SM3 on SoC was given.The structure of the algorithm was analyzed mainly,and the algorithm was realized by the Verilog hardware description language,in order to simulate this algorithm,the Altera simulation software ModelSim was
Meng-li SHAO,Yan-mei LI, Xin-chun YIN
doaj +3 more sources
Hardware Implementation of Sobel Edge Detection Algorithm [PDF]
ITM Web of Conferences, 2020 In the fields of image processing, feature detection, the edge detection is an important aspect. For detection of sharp changes in the properties of an image, edges are recognized as important factors which provides more information or data regarding the
Pujare Ankita +3 more
doaj +1 more source
An efficient hardware architecture for a neural network activation function generator [PDF]
, 2006 This paper proposes an efficient hardware architecture for a function generator suitable for an artificial neural network (ANN). A spline-based approximation function is designed that provides a good trade-off between accuracy and silicon area, whilst ...
Daniel Larkin +8 more
core +2 more sources
Optimized Method for Generating and Acquiring GPS Gold Codes
International Journal of Antennas and Propagation, 2015 We propose a simpler and faster Gold codes generator, which can be efficiently initialized to any desired code, with a minimum delay. Its principle consists of generating only one sequence (code number 1) from which we can produce all the other different
Khaled Rouabah +4 more
doaj +1 more source
Hardware Implementation Analysis of Min-Sum Decoders
Advances in Electrical and Electronic Engineering, 2019 The objective of this work is to propose a modified Min-Sum decoding Low Density Parity Check (LDPC) algorithm and perform the hardware implementation analysis of Min-Sum, optimized Min-Sum and modified Min-Sum decoders. The Min-Sum algorithm mainly uses
Rajagopal Anantharaman +2 more
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Graphics hardware implementation of the parameter - less self-organising map [PDF]
, 2005 This paper presents a highly parallel implementation of a new type of Self-Organising Map (SOM) using graphics hardware. The Parameter-Less SOM smoothly adapts to new data while preserving the mapping formed by previous data. It is therefore in principle
Streit, A. +8 more
core +1 more source