Results 231 to 240 of about 7,660,462 (281)

Implementing Exact Calculations in Hardware

IEEE Transactions on Computers, 1987
A technique for performing exact calculations is discussed. The technique uses single-modulus P arithmetic to perform calculations over the finite field of integers and the finite ring of integers. It is shown that the arithmetic operations modulo P (which obviously can be implemented in microprocessor configurations, VLSI, and/or software) can easily ...
Thomas, Jay J., Parker, Sydney R.
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Special Session: The Recent Advance in Hardware Implementation of Post-Quantum Cryptography

IEEE VLSI Test Symposium, 2020
The recent advancement in quantum technology has initiated a new round of cryptosystem innovation, i.e., the emergence of Post-Quantum Cryptography (PQC).
Jiafeng Xie, K. Basu, K. Gaj, Ujjwal Guin   +3 more
semanticscholar   +1 more source

AES Embedded Hardware Implementation

Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
The paper presents a parallel reconfigurable hardware implementation of the AES cryptographic algorithm developed for an embedded application. This new methodology directly maps a design described in a high level language, Handel-C, to FPGA platforms. The Handel-C approach narrows the gap between performance and flexibility, and thus, reduce the risk ...
O.-c. Mourad, S.-M. Lotfy, M. Noureddine, B. Ahmed, T. Camel   +4 more
openaire   +1 more source

Hardware Implementation of Cancellable Biometric Systems

2020 Fourth International Conference on I-SMAC (IoT in Social, Mobile, Analytics and Cloud) (I-SMAC), 2020
The use of biometrics in security applications may be vulnerable to several challenges of hacking. Thus, the emergence of cancellable biometrics becomes a suitable solution to this problem.
Lamiaa A. Abou Elazm, S. Ibrahim, Mohamed G. Egila, H. Shawkey, M. Elsaid, W. El-shafai, F. A. Abd El‑Samie   +6 more
semanticscholar   +1 more source

Application of the residue number system to reduce hardware costs of the convolutional neural network implementation

Mathematics and Computers in Simulation, 2020
Convolutional neural networks are a promising tool for solving the problem of pattern recognition. Most well-known convolutional neural networks implementations require a significant amount of memory to store weights in the process of learning and ...
M. Valueva, N. N. Nagornov, P. A. Lyakhov, G. Valuev, N. Chervyakov   +4 more
semanticscholar   +1 more source

Polar Decoding Hardware Implementation

2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2019
This paper presents hardware implementations of two principle polar decoding algorithms: Successive Cancellation Decoding (SCD) and Successive Cancellation List Decoding (SCL). The proposed designs are compliant with 3GPP specifications in terms of block length and frozen-set mapping.
Lam Vinh Qui Nguyen, Jean Dion, Nicolas Gresset   +2 more
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Simplified Hardware Implementation of the Softmax Activation Function

International Conference on Modern Circuits and Systems Technologies, 2019
In this paper a simplified hardware implementation of a CNN softmax layer is proposed. Initially the softmax activation function is analyzed in terms of required accuracy and certain optimizations are proposed.
I. Kouretas, Vassilis Paliouras
semanticscholar   +1 more source

Hardware implementation

Proceedings of the December 9-11, 1968, fall joint computer conference, part II on - AFIPS '68 (Fall, part II), 1968
The area of hardware implementation shall be (some-what arbitrarily) defined to include placement, wire routing, terminal assignment, and the interface to hardware fabrication devices. At this stage, many companies have automated at least some of these steps.
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Hardware implementation of CNN

Proceedings of 2005 International Conference on Intelligent Sensing and Information Processing, 2005., 2005
The requisite properties of analog CNN components, like the Gilbert multiplier, Operational transconductance amplifier, and the current mirror, were separately estimated. Interconnect for a single cell was analyzed , and extended for a 3 /spl times/3 CNN, that has been implemented. A programmable integration time-constant and a template programmability
S. Veni, B. Yamuna
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Hardware implementation of habituation

Proceedings of ISCAS'95 - International Symposium on Circuits and Systems, 2002
Habituation is a biological behavior allowing non-critical information to be disregarded enabling more processing resources for critical tasks. We have implemented habituation adaptation in VLSI. Our simulations and experimental results illustrate the habituation response.
T. Wang, L.A. Akers
openaire   +1 more source