Results 241 to 250 of about 7,660,462 (281)

Hardware Implementation of Discrete Stochastic Arithmetic

Numerical Algorithms, 2004
In this paper we present a hardware implementation of the Discrete Stochastic Arithmetic (DSA) which is based on CESTAC (Controle et Estimation STochastique des Arrondis de Calculs), a method of controlling round-off errors in floating-point scientific computations.
Chotin-Avot, Roselyne, Mehrez, Habib
openaire   +4 more sources

Hardware implementation of the neural gas

Proceedings of International Conference on Neural Networks (ICNN'97), 2002
The paper presents a hardware implementation of the neural gas (NGAS) algorithm. The NGAS is based on vector quantization and is applied to very low bit-rate video compression. The algorithm exhibits interesting properties that can be exploited in an HW realization. The modular structure provides inherent parallelism and can therefore be regarded as an
Ancona F, ROVETTA, STEFANO, ZUNINO, RODOLFO   +2 more
openaire   +2 more sources

When Neural Architecture Search Meets Hardware Implementation: from Hardware Awareness to Co-Design

IEEE Computer Society Annual Symposium on VLSI, 2019
Neural Architecture Search (NAS), that automatically identifies the best network architecture, is a promising technique to respond to the ever-growing demand for application-specific Artificial Intelligence (AI).
Xinyi Zhang, Weiwen Jiang, Yiyu Shi, J. Hu   +3 more
semanticscholar   +1 more source

Hardware Design and Implementation

2017
The chapter introduces the hardware design of an automated system for prediction and detection of cardiac arrhythmias especially VT/VF. The system’s architecture is presented, the preprocessing stage is explained, then the system control scheme is introduced, and next the specifics for the realization of the QRS complex, the P and T wave signal ...
Hani Saleh, Nourhan Bayasi, Baker Mohammad, Mohammed Ismail   +3 more
openaire   +1 more source

Hardware Implementation of Sigmoid Activation Functions using FPGA

2019 IEEE 15th International Conference on the Experience of Designing and Application of CAD Systems (CADSM), 2019
The methods of approximation of the sigmoid function are developed and modified, using piecewise linear approximation and approximation by a second order polynomial. The estimation of the accuracy of approximation by these methods of sigmoid function and
I. Tsmots, O. Skorokhoda, V. Rabyk
semanticscholar   +1 more source

Hardware Implementation for Multiple Activation Functions

2019 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-TW), 2019
In a neural network, the activation function defines the output of that node. In this paper, we propose a novel hardware implementation for AI hardware accelerators to support three popularly used activation functions, including Hyperbolic Tangent ...
Chih-Hsiang Chang, Hsu-Yu Kao, Shih-Hsu Huang   +2 more
semanticscholar   +1 more source

Hardware Implementation of Pairings

2009
In this chapter the efficient hardware implementation of pairings is considered. For each of the three fields,andsuitable curves, pairing algorithms and field arithmetic architectures are presented. An example architecture for computing the ηTpairing in characteristic 2 or 3 is presented and its implementation results on a Xilinx FPGA ...
Keller Maurice, Ronan Robert, Byrne Andrew, Murphy Colin, Marnane William   +4 more
openaire   +1 more source

Hardware Implementation of Finite-Field Division

Acta Applicandae Mathematicae, 2006
zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Deschamps, Jean-Pierre, Sutter, Gustavo
openaire   +2 more sources

HARDWARE IMPLEMENTATION OF DECISION TREE ENSEMBLES

Journal of Circuits, Systems and Computers, 2013
In this paper, several hardware architectures for the realization of ensembles of axis-parallel, oblique and nonlinear decision trees (DTs) are presented. Hardware architectures for the implementation of a number of ensemble combination rules are also presented.
Rastislav Struharik, Ladislav Novak
openaire   +1 more source

Electronic hardware implementations of neural networks

Applied Optics, 1987
This paper examines some of the present work on the development of electronic neural network hardware. In particular, the investigations currently under way at JPL on neural network hardware implementations based on custom very large scale integrated technology, novel thin film materials, and an analog-digital hybrid architecture are reviewed.
A P, Thakoor, A, Moopenn, J, Lambe, S K, Khanna   +3 more
openaire   +2 more sources