Results 261 to 270 of about 72,792 (298)
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“The flipped voltage follower”-based low voltage fully differential CMOS sample-and-hold circuit
2008 IEEE International Symposium on Circuits and Systems (ISCAS), 2008This paper presents the design and preliminary results of a full differential sample-and-hold circuit based on the "flipped voltage follower" (FVF) cell. The heart of this circuit is a fully differential low-voltage OTA based on FVF technique. The use of the FVF reduces the supply power requirements in the OTA.
Christian Jesús B. Fayomi +3 more
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Latchup holding voltages and trigger currents in an SOI technology
2016 IEEE International Reliability Physics Symposium (IRPS), 2016This paper investigates holding voltages and trigger currents in a Silicon-on-Insulator technology. These parameters can be used in automated layout checks. Via a new measurement method, where the well-bias of the test structures is varied with regard to the bias of the emitters of the thyristor, a strong dependency on the emitter distance, and a weak ...
Guido Quax, Theo Smedes
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A proposal to improve the quality of a sample and hold output voltage
International Journal of Electronics, 2005Digital electronics is more and more used for processing or storage of analogue signals. However, the restored signal consists of a set of horizontal segments, which involves a change in this signal and so a presence of parasitic harmonics and an increase in the distortion rate.
J. Bayard *, M. Ayachi
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Effects of substrate resistance on CMOS latchup holding voltages
IEEE Transactions on Electron Devices, 1987We suggest a method to estimate the effects of substrate resistances on the latchup holding voltage of CMOS integrated circuits. The estimated holding voltages are shown to be in reasonable agreement with the experimental data inspite of two bold approximations.
R.K. Gupta, I. Sakai, null Chenming Hu
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Geometrical effects on hold-off voltage in polystyrene insulator
2010 IEEE International Power Modulator and High Voltage Conference, 2010Research has shown that there are several methods by which higher flashover and breakdown voltages of electrical insulating materials can be achieved. While breakdown voltage is predominantly affected by the insulation bulk material, many factors contribute to the flashover performance of an insulator.
A. Caulcrick +4 more
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Optimization of Holding Voltage for 5V Multi-Finger NMOS Using Voltage Stepping Simulation
Applied Mechanics and Materials, 2015For IC component designs, ESD is one of an important issue which has to be taken in consideration for reliability of a device. We use the TLP Voltage Stepping simulation scheme in Medici simulation for 5V NMOS Multi-finger structure, the use of silicon model and set of variables, in silicon material parameter is used to vary the variable electron and ...
Aryadeep Mrinal +5 more
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IEEE Transactions on Electron Devices, 2018
The modified silicon-controlled rectifier (SCR) fabricated in a 0.25- $\mu \text{m}$ high-voltage (HV) bipolar-CMOS-DMOS (BCD) technology has been proposed to seek for both effective electrostatic discharge (ESD) protection and latchup immunity. Experimental results show that one of the proposed SCRs has a high holding voltage of up to ~30 V in ...
Chia-Tsen Dai, Ming-Dou Ker
exaly +2 more sources
The modified silicon-controlled rectifier (SCR) fabricated in a 0.25- $\mu \text{m}$ high-voltage (HV) bipolar-CMOS-DMOS (BCD) technology has been proposed to seek for both effective electrostatic discharge (ESD) protection and latchup immunity. Experimental results show that one of the proposed SCRs has a high holding voltage of up to ~30 V in ...
Chia-Tsen Dai, Ming-Dou Ker
exaly +2 more sources
A New dual directional SCR with high holding voltage for High Voltage ESD protection
2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC), 2019In this paper, A novel high holding voltage dual-directional SCR (HHV-DDSCR) is proposed. The ESD I-V characteristics of HHV-DDSCR and DDSCR (dual-directional SCR) are simulated with the Sentaurus TCAD software. Compared with the DDSCR, the new HHV-DDSCR dramatically increases the holding voltage from 2V to 14V with relatively stable trigger voltage ...
Shiyu Song +5 more
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High-Voltage ESD Protection Device With Fast Transient Reaction and High Holding Voltage
IEEE Transactions on Electron Devices, 2019A stacked p-n-p(s) and grounded-gate NMOS (ggNMOS) electrostatic discharge (ESD) solution, with higher holding voltage ( ${V}_{H}$ ) and faster transient reaction than a p-n-p-embedded SCR, is proposed for high-voltage (HV) applications. The lowering of the beta gain ( $\beta$ ) of the p-n-p by the use of a deep-N-well (DNW)-based p-n-p in the ...
Da-Wei Lai +4 more
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IEEE Transactions on Plasma Science, 2013
In the framework of the program for the construction-in Padova, Italy-of the first prototype of the International Thermonuclear Experimental Reactor 1 MeV-16 MW negative neutral beam injector (NNBI), an R&D activity on voltage holding in vacuum has been initiated since 2009, aimed at supporting the design, construction, and development of the NNBI ...
Antonio De Lorenzi +2 more
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In the framework of the program for the construction-in Padova, Italy-of the first prototype of the International Thermonuclear Experimental Reactor 1 MeV-16 MW negative neutral beam injector (NNBI), an R&D activity on voltage holding in vacuum has been initiated since 2009, aimed at supporting the design, construction, and development of the NNBI ...
Antonio De Lorenzi +2 more
openaire +2 more sources