Results 11 to 20 of about 2,741,809 (181)

Instruction sequence expressions for the Karatsuba multiplication algorithm. [PDF]

open access: yesCoRR, 2013
The Karatsuba multiplication algorithm is an algorithm for computing the product of two natural numbers represented in the binary number system. This means that the algorithm actually computes a function on bit strings. The restriction of this function to bit strings of any given length can be computed according to the Karatsuba multiplication ...
Bergstra, J.A., Middelburg, C.A.
core   +7 more sources

Karatsuba-Ofman Multiplier with Integrated Modular Reduction for GF(2m)

open access: yesAdvances in Electrical and Computer Engineering, 2013
In this paper a novel GF(2m) multiplier based on Karatsuba-Ofman Algorithm is presented. A binary field multiplication in polynomial basis is typically viewed as a two steps process, a polynomial multiplication followed by a modular reduction step ...
CUEVAS-FARFAN, E.   +6 more
doaj   +2 more sources

Integrated NTT-Karatsuba for fast multiplication of NTRU Algorithm

open access: yesJITeCS (Journal of Information Technology and Computer Science)
The increasing threat of attacks from quantum computers requires the development of more efficient and secure post-quantum cryptographic algorithms, one of which is NTRU.
Muhammad Fathan Rivaldi   +2 more
doaj   +2 more sources

Generalizations of the Karatsuba Algorithm for Efficient Implementations. [PDF]

open access: yesIACR Cryptol. ePrint Arch., 2006
In this work we generalize the classical Karatsuba Algorithm (KA) for polynomial multiplication to (i) polynomials of arbitrary degree and (ii) recursive use.
André Weimerskirch, Christof Paar
core   +3 more sources

Reversible Karatsuba's Algorithm [PDF]

open access: yesJ. Univers. Comput. Sci., 2006
JUCS - Journal of Universal Computer Science Volume Nr.
Kowada,Luis Antonio Brasil   +2 more
openaire   +3 more sources

Field Programmable Gate Array based elliptic curve Menezes‐Qu‐Vanstone key agreement protocol realization using Physical Unclonable Function and true random number generator primitives

open access: yesIET Circuits, Devices &Systems, Volume 16, Issue 5, Page 382-398, August 2022., 2022
Abstract The trust, authenticity and integrity of Internet‐of‐Things (IoT) systems are heavily reliant on Physical Unclonable Functions (PUFs) and True random number generators (TRNGs). The PUF and TRNG produce device intrinsic digital signatures and random binary sequences, which are used for cryptographic key generation, key agreement/exchange ...
N. Nalla Anandakumar   +2 more
wiley   +1 more source

A Practical Anonymous Voting Scheme Based on Blockchain for Internet of Energy

open access: yesSecurity and Communication Networks, Volume 2022, Issue 1, 2022., 2022
E‐voting allows us to build a democratic business in most Internet of things (IoT) systems. For example, we may vote to choose a proper energy broker in a smart grid system. In this study, we focus on e‐voting services in an Internet of energy (IoE) system, which is a new‐style smart grid.
Houpeng Hu   +7 more
wiley   +1 more source

Fast Implementation of Multiplication on Polynomial Rings

open access: yesSecurity and Communication Networks, Volume 2022, Issue 1, 2022., 2022
Multiplication on polynomial rings has been widely used in public‐key cryptographic schemes based on ideal lattices. It is an important module that significantly affects the efficiency of the schemes. Improved Preprocess‐then‐NTT (IPtNTT) is an algorithm which can fast realize multiplication on polynomial rings.
Boyu Wang   +3 more
wiley   +1 more source

Lightweight and High‐Performance Data Protection for Edge Network Security

open access: yesWireless Communications and Mobile Computing, Volume 2022, Issue 1, 2022., 2022
To strengthen the security of edge network data and reduce network latency, in this paper, we combine an advanced reduced instruction set computing machine (ARM) and a field programmable gate array (FPGA) to propose a lightweight ARM‐FPGA computing architecture for edge network data security protection and acceleration.
Xiaojie Chen   +3 more
wiley   +1 more source

Multi‐precision binary multiplier architecture for multi‐precision floating‐point multiplication

open access: yesIET Circuits, Devices &Systems, Volume 15, Issue 5, Page 455-464, August 2021., 2021
Abstract Arithmetic logic units (ALUs) are core components of processing devices that perform required arithmetic and logical operations such as multiplication, division, addition, subtraction, and squaring. The multiplication operation is frequently used in ALUs in engineering applications such as signal processing, video processing and image ...
Geetam Singh Tomar   +2 more
wiley   +1 more source

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