Results 31 to 40 of about 2,741,809 (181)
Booth-Encoded Karatsuba: A Novel Hardware-Efficient Multiplier
Advances in Electrical and Electronic Engineering, 2021 There is a recent boom being witnessed in emerging areas like IoMT (Internet of Medical Things), Artificial Intelligence for healthcare, and disaster management.
Riya Jain, Khushbu Pahwa, Neeta Pandey
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IEEE Access, 2018 Three-operation multiplication (TOM) over binary extension field is frequently encountered in cryptosystems such as elliptic curve cryptography. Though digit-serial polynomial basis multipliers are usually preferred for the realization of TOM due to ...
Chiou-Yng Lee +3 more
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A High-Speed Accelerator for Homomorphic Encryption using the Karatsuba Algorithm [PDF]
ACM Transactions on Embedded Computing Systems, 2017 Somewhat Homomorphic Encryption (SHE) schemes can be used to carry out operations on ciphered data. In a cloud computing scenario, personal information can be processed secretly, inferring a high level of confidentiality. The principle limitation of SHE is the size of ciphertext compared to the size of the message.
Migliore, Vincent +7 more
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Design of High Speed FFT using UrdhvaTiryagbhyam Algorithm and Karatsuba Algorithm
International Journal of Engineering and Advanced Technology, 2020 In gift scenario each method has to be compelled to be quick, adept and simple. Fast Fourier transform (FFT) may be a competent algorithmic program to calculate the N purpose Discrete Fourier transform (DFT).It has huge applications in communication systems, signal processing and image processing and instrumentation.
S. S. Kerur, Mustaq Kunnur
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Resource Efficient Single Precision Floating Point Multiplier Using Karatsuba Algorithm [PDF]
, 2018 In floating point arithmetic operations, multiplication is the most required operation for many signal processing and scientific applications. 24-bit length mantissa multiplication is involved to obtain the floating point multiplication final result for ...
P, Samundiswary; Pondicherry University +3 more
core +3 more sources
Advanced Intelligent Systems, Volume 2, Issue 11, November 2020., 2020 The design considerations, challenges, and perspectives are discussed and recent advances in monolithically integrated complementary metal–oxide–semiconductor (CMOS)‐resistive switching (RS) memory vector‐matrix multiplication (VMM) hardware for accelerating modern neural network applications are elucidated. It devises a new perspective on the physical
Amirali Amirsoleimani +8 more
wiley +1 more source
Современные информационные технологии и IT-образование, 2019 Calculations with a large amount of data (or data of a large dimension) are usually reduced to sets of calculations with fairly small amounts of them.
Rustem R. Aidagulov, Sergei T. Glavatsky
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Mimic Encryption Box for Network Multimedia Data Security
Security and Communication Networks, Volume 2020, Issue 1, 2020., 2020 With the rapid development of the Internet, the security of network multimedia data has attracted increasingly more attention. The moving target defense (MTD) and cyber mimic defense (CMD) approaches provide a new way to solve this problem. To enhance the security of network multimedia data, this paper proposes a mimic encryption box for network ...
Xiabing Zhou +4 more
wiley +1 more source
Instruction Sequences Expressing Multiplication Algorithms [PDF]
Scientific Annals of Computer Science, 2018 For each function on bit strings, its restriction to bit strings of any given length can be computed by a finite instruction sequence that contains only instructions to set and get the content of Boolean registers, forward jump instructions, and a ...
J.A. Bergstra, C.A. Middelburg
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SEMI-CUSTOM DESIGN OF MULTIPLY-ACCUMULATE UNIT [PDF]
Proceedings on Engineering SciencesIn this research work, a novel approach to design a low-power 16-bit Multiply-Accumulate (MAC) unit for deep neural network (DNN) accelerators is presented. The approach integrates the Karatsuba Algorithm, Vedic multiplier using Urdhva Tiryagbhyam Sutra,
Christopher C R , Umadevi S
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