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Low-power CMOS digital design [PDF]
IEEE Journal of Solid-State Circuits, 1992 Motivated by emerging battery-operated applications that demand intensive computation in portable environments, techniques are investigated which reduce power consumption in CMOS digital circuits while maintaining computational throughput. Techniques for low-power operation are shown which use the lowest possible supply voltage coupled with ...
A P Chandrakasan, R W Brodersen
exaly +2 more sources
SPICE Modeling and Circuit Demonstration of a SiC Power IC Technology
IEEE Journal of the Electron Devices Society, 2022 Silicon carbide (SiC) power integrated circuit (IC) technology allows monolithic integration of 600V lateral SiC power MOSFETs and low-voltage SiC CMOS devices.
Tianshi Liu +9 more
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IEEE Access, 2022 We propose a CMOS image sensor with a dedicated low-power imaging mode and low-power integrated transmitter. The proposed CMOS image sensor selectively operates in dual mode: a high-quality mode with a 1.5 V supply voltage of readout circuits to achieve ...
Sang-Hoon Kim +4 more
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Low-Power CMOS Frequency Comparator
2023 46th MIPRO ICT and Electronics Convention (MIPRO), 2023 This paper is focused on the design and analysis of a fully on-chip frequency comparator (FC) implemented in 65 nm CMOS technology. The proposed FC employs a digital pre-processing stage followed by a rail-to-rail input and output (RRIO) voltage comparator, with low power consumption in units of µW.
Martin Kovác +5 more
openaire +2 more sources
Low Power Clock Generator Design With CMOS Signaling
IEEE Open Journal of the Solid-State Circuits Society, 2021 The requirements for computing with higher energy efficiency in the datacenter and for longer battery life in laptop computers, cell phones, and other IoT devices while increasing performance with higher frequency and more cores, drive the needs for more
Yongping Fan, Ian A. Young
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Low-Voltage LDO Regulator Based on Native MOS Transistor with Improved PSR and Fast Response
Energies, 2023 In this paper, a low-voltage low-dropout analog regulator (ALDO) based on a native n-channel MOS transistor is proposed. Application of the native transistor with the threshold voltage close to zero allows elimination of the charge pump in low-voltage ...
Grzegorz Blakiewicz
doaj +1 more source
Low Noise Low Power CMOS Telescopic-OTA for Bio-Medical Applications
Computers, 2016 The preamplifier block is crucial in bio-medical signal processing. The power intensive Operational Transconductance Amplifier (OTA) is considered, and the performance of preamplifier is studied.
Bellamkonda Saidulu +2 more
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Low‐leakage zero‐static power consumption analogue CMOS switch
Electronics Letters, 2021 The architecture of a low‐leakage switch in complementary metal‐oxide‐semiconductor (CMOS) technology developed to implement long‐term analogue memories for low‐power applications is presented.
Giuseppe Sciortino +4 more
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Low-Voltage, Low-Area, nW-Power CMOS Digital-Based Biosignal Amplifier
IEEE Access, 2022 This paper presents the operation principle and the silicon characterization of a power efficient ultra-low voltage and ultra-low area fully-differential, digital-based Operational Transconductance Amplifier (OTA), suitable for microscale biosensing ...
Pedro Toledo +4 more
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Semidigital PLL Design for Low-Cost Low-Power Clock Generation
Journal of Electrical and Computer Engineering, 2011 This paper describes recent semidigital architectures of the phase-locked loop (PLL) systems for low-cost low-power clock generation. With the absence of the time-to-digital converter (TDC), the semi-digital PLL (SDPLL) enables low-power linear phase ...
Ni Xu, Woogeun Rhee, Zhihua Wang
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