Results 11 to 20 of about 14,704,035 (301)
Recently, double-gate MOSFETs (DGMOSFETs) have been shown to be more optimal for ultra-low power circuit design due to the improved subthreshold slope and the reduced leakage current compared to bulk CMOS.
Tony T. Kim +3 more
doaj +2 more sources
Development of CMOS active pixel sensors [PDF]
This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.This thesis describes an investigation into the suitability of complementary metal oxide semiconductor (CMOS) active pixel sensor (APS) devices for ...
Greig, Thomas Alexander
core +7 more sources
Low-Power CMOS Frequency Comparator
This paper is focused on the design and analysis of a fully on-chip frequency comparator (FC) implemented in 65 nm CMOS technology. The proposed FC employs a digital pre-processing stage followed by a rail-to-rail input and output (RRIO) voltage comparator, with low power consumption in units of µW.
Martin Kovác +5 more
openaire +2 more sources
A Fully Differential Digital CMOS Pulse UWB Generator [PDF]
A new fully-digital CMOS pulse generator for impulse-radio Ultra-Wide-Band (UWB) systems is presented. First, the shape of the pulse which best fits the FCC regulation in the 3.1-5 GHz sub-band of the entire 3.1-10.6 GHz UWB bandwidth is derived and ...
Graziano, Mariagrazia +2 more
core +1 more source
Frequency Compensation of High-Speed, Low-Voltage CMOS Multistage Amplifiers [PDF]
Aamir SA, Harikumar P, Wikner JJ. Frequency Compensation of High-Speed, Low-Voltage CMOS Multistage Amplifiers. In: 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).
Syed Ahmed Aamir +8 more
core +1 more source
An Ultra-Low-Power Front-End Neural Interface with Automatic Gain for Uncalibrated Monitoring [PDF]
This paper presents a dynamic front-end towards achieving unsupervised single-neuron activity monitoring. By implementing at the front-end, an automatic gain control that is optimised for neural signal dynamics, subsequent processing can be achieved ...
Timothy G. Constandinou +3 more
core +1 more source
Leakage Power Analysis and Comparison of Deep Submicron Logic Gates
Basic combinational gates, including NAND, NOR and XOR, are fundamental building blocks in CMOS digital circuits. This paper analyses and compares the power consumption due to transistor leakage of low-order and high-order basic logic gates. The NAND and
Merrett, Geoff, Al-Hashimi, Bashir M.
core +2 more sources
A 3.3 V mode-switching RF CMOS power amplifier (PA) for WLAN applications is presented, which is integrated into a 55-nm bulk CMOS process. The proposed PA offers both static control and dynamic power control, allowing it to operate efficiently in both ...
Haoyu Shen, Taishan Mo, Bin Wu
doaj +1 more source
A Reconfigurable Low-Voltage and Low-Power Millimeter-Wave Dual-Band Mixer in 65-nm CMOS
In this paper, we propose, investigate, and demonstrate a reconfigurable low-voltage and low-power millimeter-wave mixer in a 65-nm CMOS, which can be switched as either a subharmonic mixer (SHM) or a fundamental mixer (FM) for the dual-band applications.
Fang Zhu, Kuangda Wang, Ke Wu
doaj +1 more source
A Low-Power All-Digital on-Chip CMOS Oscillator for a Wireless Sensor Node
This paper presents an all-digital low-power oscillator for reference clocks in wireless body area network (WBAN) applications. The proposed on-chip complementary metal-oxide-semiconductor (CMOS) oscillator provides low-frequency clock signals with low ...
Duo Sheng, Min-Rong Hong
doaj +1 more source

