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Temporal partitioning for mixed-criticality systems
ETFA2011, 2011In embedded systems, such as aerospace crafts and automobiles, it is desirable to run several real-time applications of different criticality on a single computing board by exploiting temporal partitioning. The applications, however, are usually developed by different organizations independently.
Hyun-Wook Jin, Sanghyun Han
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Implementing Mixed Criticality Systems in Ada
2011Many safety-critical embedded systems are subject to certification requirements. However, only a subset of the functionality of the system may be safety-critical and hence subject to certification; the rest of the functionality is non safety-critical and does not need to be certified, or is certified to a lower level.
Sanjoy Baruah, Alan Burns
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Smart Certification of Mixed Criticality Systems
2005High integrity applications, such as those performing safety or security critical functions, are usually built to conform to standards such RTCA DO-178B [1] or UK Def Stan 00-55 [2]. Typically such standards define ascending levels of criticality each of which requires a different and increasingly onerous level of verification.
Peter Amey, Rod Chapman, Neil White
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Towards the Design of Certifiable Mixed-criticality Systems
2010 16th IEEE Real-Time and Embedded Technology and Applications Symposium, 2010Many safety-critical embedded systems are subject to certification requirements; some systems may be required to meet multiple sets of certification requirements, from different certification authorities. Certification requirements in such "mixed-criticality" systems give rise to some interesting scheduling problems, that cannot be satisfactorily ...
Baruah, S., Li, H., Stougie, L.
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IDAMC: A NoC for mixed criticality systems
2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, 2013Increasing demand for performance and further integration promotes the use of multi- and many-core systems - also in safety-critical embedded systems. In this domain, hardware platforms obviously have to support real-time, predictability constrained applications such as an anti-lock braking system.
Sebastian Tobuschat +3 more
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Building product-lines of mixed-criticality systems
2016 Forum on Specification and Design Languages (FDL), 2016Mixed-Criticality Systems (MCS) reconcile safetycritical requirements with multi-core architectures, by offering spatial and temporal isolation while preserving other extrafunctional properties such as optimised energy consumption or minimised latencies.
Simon Barner +4 more
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Virtualization of Reconfigurable Mixed-Criticality Systems
2022 32nd International Conference on Field-Programmable Logic and Applications (FPL), 2022Cornelia Wulf +2 more
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Scheduling Mixed-Criticality Real-Time Systems
2013This dissertation addresses the following question to the design of scheduling policies and resource allocation mechanisms in contemporary embedded systems that are implemented on integrated computing platforms: in a multitasking system where it is hard to estimate a task's worst-case execution time, how do we assign task priorities so that 1) the ...
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Composable Virtual Platforms for Mixed-Criticality Embedded Systems
2014Recent trends show a steady increase towards concurrently executing more and more applications on a single embedded system. Multi-Processor System-on-Chip (MPSoC) architectures are proposed to allow complex design of embedded systems. This is achieved by integrating as many processing resources as possible on a single chip and therefore enabling the ...
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Memory-Aware Scheduling for Mixed-Criticality Systems
2016In this paper, by taking both memory-access and computation time cost into consideration, a two-phase execution, i.e. memory-access phase first to fetch the instructions and required data, and then computation, is proposed to model mixed criticality tasks.
Zheng Li, Li Wang
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