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Temporal partitioning for mixed-criticality systems
ETFA2011, 2011In embedded systems, such as aerospace crafts and automobiles, it is desirable to run several real-time applications of different criticality on a single computing board by exploiting temporal partitioning. The applications, however, are usually developed by different organizations independently.
Hyun-Wook Jin, Sanghyun Han
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On-chip networks for mixed-criticality systems
2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2016We propose the integration of a network-on-chip-based MPSoC in mixed-criticality systems, i.e. systems running applications with different criticality levels in terms of completing their execution within predefined time limits. An MPSoC contains tiles that can be either CPUs or memories, and we connect them with an instance of a customizable point-to ...
Polydoros Petrakis +8 more
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An Adaptive Lockstep Architecture for Mixed-Criticality Systems
2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2021software with different criticality levels. Currently, research mostly focuses on software aspects for those systems and disregards hardware aspects as well as fault tolerance. In this paper, we propose and investigate a novel processor architecture for adaptive fault tolerance.
Kempf, Fabian +3 more
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Virtualizing Mixed-Criticality Operating Systems
2016 VI Brazilian Symposium on Computing Systems Engineering (SBESC), 2016The forever growing number of embedded control units in some applications such as cars or airplanes are increasing system complexity and making harder to coordinate all this hardware. The increasing capacity of embedded hardware and the advances in virtualization technology make it possible to deal with this problem.
Rodrigo Schmitt Meurer +2 more
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Scheduling of mixed-criticality systems with RUN
2015 IEEE 20th Conference on Emerging Technologies & Factory Automation (ETFA), 2015Mixed-criticality systems emerged with the aim of reconciling safety requirements and efficient use of multi-processor or uniprocessor platforms. On multi-processors, recent works on mixed-criticality have produced impressive results in terms of speed-up factor. But these solutions, based on Pfair-like scheduling algorithms, entail too many preemptions
Romain Gratia +2 more
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Implementing Mixed Criticality Systems in Ada
2011Many safety-critical embedded systems are subject to certification requirements. However, only a subset of the functionality of the system may be safety-critical and hence subject to certification; the rest of the functionality is non safety-critical and does not need to be certified, or is certified to a lower level.
Sanjoy K. Baruah, Alan Burns 0001
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Service guarantee exploration for mixed-criticality systems
2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014Most mixed-criticality scheduling algorithms have the problem of service interruption for low-critical tasks, which has prompted several recent studies on providing various service guarantees for such tasks. In this paper, focusing on dual-criticality systems, we explore the best achievable service guarantees for low-critical tasks in different running
Hang Su 0008, Nan Guan, Dakai Zhu 0001
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On the Scheduling of Fault-Tolerant Mixed-Criticality Systems
Proceedings of the 51st Annual Design Automation Conference, 2014We consider in this paper fault-tolerant mixed-criticality scheduling, where heterogeneous safety guarantees must be provided to functionalities (tasks) of varying criticalities (importances). We model explicitly the safety requirements for tasks of different criticalities according to safety standards, assuming hardware transient faults.
Pengcheng Huang 0001 +2 more
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Smart Certification of Mixed Criticality Systems
2005High integrity applications, such as those performing safety or security critical functions, are usually built to conform to standards such RTCA DO-178B [1] or UK Def Stan 00-55 [2]. Typically such standards define ascending levels of criticality each of which requires a different and increasingly onerous level of verification.
Peter Amey, Roderick Chapman, Neil White
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A Wormhole NoC Protocol for Mixed Criticality Systems
2014 IEEE Real-Time Systems Symposium, 2014Lack of scalability and difficulties in predicting the temporal behaviour of bus-based architectures has lead to the development of Network-on-Chip (NoC) protocols that provide a schedulable resource for moving data across multi-core platforms. Wormhole switching and credit-based flow control protocols have been used to support flit-level priority ...
Alan Burns 0001 +2 more
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