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Virtualizing Mixed-Criticality Operating Systems
2016 VI Brazilian Symposium on Computing Systems Engineering (SBESC), 2016The forever growing number of embedded control units in some applications such as cars or airplanes are increasing system complexity and making harder to coordinate all this hardware. The increasing capacity of embedded hardware and the advances in virtualization technology make it possible to deal with this problem.
Rodrigo Schmitt Meurer +2 more
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Implementing Mixed Criticality Systems in Ada
2011Many safety-critical embedded systems are subject to certification requirements. However, only a subset of the functionality of the system may be safety-critical and hence subject to certification; the rest of the functionality is non safety-critical and does not need to be certified, or is certified to a lower level.
Sanjoy K. Baruah, Alan Burns 0001
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Scheduling of mixed-criticality systems with RUN
2015 IEEE 20th Conference on Emerging Technologies & Factory Automation (ETFA), 2015Mixed-criticality systems emerged with the aim of reconciling safety requirements and efficient use of multi-processor or uniprocessor platforms. On multi-processors, recent works on mixed-criticality have produced impressive results in terms of speed-up factor. But these solutions, based on Pfair-like scheduling algorithms, entail too many preemptions
Romain Gratia +2 more
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An Adaptive Lockstep Architecture for Mixed-Criticality Systems
2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2021software with different criticality levels. Currently, research mostly focuses on software aspects for those systems and disregards hardware aspects as well as fault tolerance. In this paper, we propose and investigate a novel processor architecture for adaptive fault tolerance.
Kempf, Fabian +3 more
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Mixed-Criticality Systems as a Service for Non-critical Tasks
2016 IEEE 19th International Symposium on Real-Time Distributed Computing (ISORC), 2016Mixed-Criticality Systems are capable of accommodatingtasks of varying criticality. In this paper, these are [life, mission, and non-critical]. Tasks usually have an overestimatedexecution time to allow for the Worst Case Execution Time(WCET). When these tasks finish execution prior to their allottedexecution time due to pessimistic assumptions present
Mahmood Hikmet +3 more
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Criticality-Aware Partitioning for Multicore Mixed-Criticality Systems
2016 45th International Conference on Parallel Processing (ICPP), 2016The scheduling for mixed-criticality (MC) systems, where multiple activities have different certification requirements and thus different criticality on a shared hardware platform, has recently become an important research focus. In this work, considering that multicore processors have emerged as the de-facto platform for modern embedded systems, we ...
Jian-Jun Han +3 more
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Service guarantee exploration for mixed-criticality systems
2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014Most mixed-criticality scheduling algorithms have the problem of service interruption for low-critical tasks, which has prompted several recent studies on providing various service guarantees for such tasks. In this paper, focusing on dual-criticality systems, we explore the best achievable service guarantees for low-critical tasks in different running
Hang Su 0008, Nan Guan, Dakai Zhu 0001
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Smart Certification of Mixed Criticality Systems
2005High integrity applications, such as those performing safety or security critical functions, are usually built to conform to standards such RTCA DO-178B [1] or UK Def Stan 00-55 [2]. Typically such standards define ascending levels of criticality each of which requires a different and increasingly onerous level of verification.
Peter Amey, Roderick Chapman, Neil White
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On the Scheduling of Fault-Tolerant Mixed-Criticality Systems
Proceedings of the 51st Annual Design Automation Conference, 2014We consider in this paper fault-tolerant mixed-criticality scheduling, where heterogeneous safety guarantees must be provided to functionalities (tasks) of varying criticalities (importances). We model explicitly the safety requirements for tasks of different criticalities according to safety standards, assuming hardware transient faults.
Pengcheng Huang 0001 +2 more
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Embedded systems for safety-critical and mixed-criticality applications
2013 2nd Mediterranean Conference on Embedded Computing (MECO), 2013Summary form only given. Multi-core processors promise a number of benefits for development of dependable embedded systems. They offer higher performance than single-core processors and consume less energy than high-speed single cores of equivalent computational power, reducing this way a number of computational nodes and wiring in a system and ...
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