Results 21 to 30 of about 593,318 (265)
BPCM: A Flexible High-Speed Bypass Parallel Communication Mechanism for GPU Cluster
With the increasing complexity of computational tasks faced by artificial intelligence technology, the scale of machine learning models continues to expand, and the data volume and frequency of parameter synchronization also increase. This will cause the
Mingjie Wu, Qingkui Chen, Jingjuan Wang
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A Survey of System Level Power Management Schemes in the Dark-Silicon Era for Many-Core Architectures [PDF]
Power consumption in Complementary Metal Oxide Semiconductor (CMOS) technology has escalated to a point that only a fractional part of many-core chips can be powered-on at a time.
Emmannuel Ofori-Attah +2 more
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A Wideband Fast Start-Up Multi-Core VCO With Auto-Frequency Control in 0.18 μm CMOS
A 2.8 – 4.6 GHz wideband multi-core VCO with a fast start-up scheme is presented in this brief. The proposed multi-core VCO uses a successive approximation register based auto frequency control (SAR-AFC) loop with the embedded 2/3 Judge to ensure ...
Yao Li, Bo Zhou, Zuhang Wang
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To mitigate the ever worsening “Power wall” and “Memory wall” problems, multi-core architectures with multi-level cache hierarchies have been widely accepted in modern processors.
Ming Ling +3 more
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We report an innovative design of a multi-core photonic crystal fibre-based surface plasmon resonance temperature sensor using ethanol and benzene as temperature-sensitive materials with a segmented outer-surface metal coating scheme.
Samuel Osifeso +3 more
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Parallel Computational Intelligence-Based Multi-Camera Surveillance System
In this work, we present a multi-camera surveillance system based on the use of self-organizing neural networks to represent events on video. The system processes several tasks in parallel using GPUs (graphic processor units).
Sergio Orts-Escolano +5 more
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Non-Blocking Synchronization Between Real-Time and Non-Real-Time Applications
Real-time systems where applications with timing requirements coexist with applications without timing constraints are increasingly common. Furthermore, the processors used in desktops, smart phones or embedded devices are mostly multi-core, allowing the
Alejandro Perez Ruiz +2 more
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Exploiting multi–core and many–core parallelism for subspace clustering
Finding clusters in high dimensional data is a challenging research problem. Subspace clustering algorithms aim to find clusters in all possible subspaces of the dataset, where a subspace is a subset of dimensions of the data.
Datta Amitava +3 more
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Portable and Configurable Implementation of ARINC-653 Temporal Partitioning for Small Civilian UAVs
The ARINC-653 standard defines temporal partitioning that enables multiple avionics applications to execute independently from each other without interference in terms of CPU resources.
Hyun-Chul Jo +4 more
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Sparse LU factorization is a key tool in the solution of large linear set of algebraic equations encompassing a wide range of computing applications. Recent advances in this field exploit the massively parallel architecture of the GPUs via left-looking ...
Wai-Kong Lee, Ramachandra Achar
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