Results 31 to 40 of about 4,133,040 (316)
A Parallel Extension Rule-Based Algorithm for #SAT Problem Using Model-Counting Tree
IEEE Access, 2018 The #SAT problem, which is also called model counting, is one of the most important problems in artificial intelligence and is challenging to the researchers.
Naiyu Tian +4 more
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ChipsThe fast expansion of the Internet of Things (IoT) has increased the need for strong security measures to protect the enormous network of interconnected devices.
Ramakrishna Goli +2 more
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On the Determinism of Multi-core Processors
, 2013 Hard real time systems are evolving in order to respond to the increasing demand in complex functionalities while taking advantage of newer hardware. Software development for safety critical systems has to comply with strict requirements that will facilitate the certification process. During this process, each part of the system is evaluated, requiring
Paun, Vladimir-Alexandru +2 more
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Research on Three Dimensional Scheduling Model for Embedded Multi-Core System [PDF]
Xibei Gongye Daxue Xuebao, 2018 This paper proposes a new three-dimensional scheduling model which can divide the tasks into harmonic tasks and non-harmonic tasks for the high demands of embedded mucticne plactorim.
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Application of Virtualization Technology in Aeronautical Computing Field
Hangkong gongcheng jinzhan, 2022 Virtualization technology has tremendous advantages in dealing with resource allocation,application migration and isolation. To meet the demands of integration and intelligence in aeronautical computing field,as well as the constraints of real-time ...
CUI Delong, XIA Man
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Accelerating Code on Multi-cores with FastFlow [PDF]
, 2011 FastFlow is a programming framework specifically targeting cache-coherent shared-memory multi-cores. It is implemented as a stack of C++ template libraries built on top of lock-free (and memory fence free) synchronization mechanisms. Its philosophy is to combine programmability with performance.
Marco Aldinucci +4 more
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A RISC-V Fault-Tolerant Soft-Processor Based on Full/Partial Heterogeneous Dual-Core Protection
IEEE AccessThe low probability of single event upsets (SEU) within particular satellite orbits, makes Commercial-off-the-shelf (COTS) electronic components a viable solution for space system implementation, thanks to the introduction of design-level fault tolerance
Francesco Vigli +5 more
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IMPROVING THE EFFICIENCY OF THE METHOD OF SPECULATIVE MULTI-THREADING FOR DYNAMIC PARALLELIZING
Статистика и экономика, 2016 The possibilities of the method of speculative multithreading dynamic parallelization of sequential programs. It implemented its formalization and identified characteristics of the method, the account which will increase the efficiency of its use in ...
Marina A. Bakuleva, Alexander V. Bakulev
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Energy Efficient Multi-Core Processing [PDF]
, 2014 This paper evaluates the present state of the art of energy-efficient embedded processor design techniques and demonstrates, how small, variable-architecture embedded processors may exploit a run-time minimal architectural synthesis technique to achieve ...
Kazmierski, Tom J. +4 more
core +1 more source
FEBS Letters, EarlyView.We identified a systemic, progressive loss of protein S‐glutathionylation—detected by nonreducing western blotting—alongside dysregulation of glutathione‐cycle enzymes in both neuronal and peripheral tissues of Taiwanese SMA mice. These alterations were partially rescued by SMN antisense oligonucleotide therapy, revealing persistent redox imbalance as ...
Sofia Vrettou, Brunhilde Wirth
wiley +1 more source