Results 61 to 70 of about 18,384 (300)

Giant tunnelling electroresistance in atomic-scale ferroelectric tunnel junctions

Nature Communications
Ferroelectric tunnel junctions are promising towards high-reliability and low-power non-volatile memories and computing devices. Yet it is challenging to maintain a high tunnelling electroresistance when the ferroelectric layer is thinned down towards ...
Yueyang Jia, Qianqian Yang, Yue-Wen Fang, Yue Lu, Maosong Xie, Jianyong Wei, Jianjun Tian, Linxing Zhang, Rui Yang   +8 more
doaj   +1 more source

Two-terminal floating-gate memory with van der Waals heterostructures for ultrahigh on/off ratio

Nature Communications, 2016
Traditional non-volatile memories suffer from poor scalability in the vertical direction due to the use of a bulky oxide layer. Here, the authors develop a tunnelling random access memory using a vertical heterostructure composed of atomically thin ...
Quoc An Vu, Yong Seon Shin, Young Rae Kim, Van Luan Nguyen, Won Tae Kang, Hyun Kim, Dinh Hoa Luong, Il Min Lee, Kiyoung Lee, Dong-Su Ko, Jinseong Heo, Seongjun Park, Young Hee Lee, Woo Jong Yu   +13 more
doaj   +1 more source

Espresso

ACM SIGPLAN Notices, 2018
Fast, byte-addressable non-volatile memory (NVM) embraces both near-DRAM latency and disk-like persistence, which has generated considerable interests to revolutionize system software stack and programming models. However, it is less understood how NVM can be combined with managed runtime like Java virtual machine (JVM) to ease persistence management ...
Mingyu Wu 0001, Ziming Zhao 0003, Haoyu Li, Heting Li, Haibo Chen 0001, Binyu Zang, Haibing Guan   +6 more
openaire   +2 more sources

Chiral Phase Change Nanomaterials

Advanced Functional Materials, EarlyView.
This work demonstrates reversible, non‐volatile phase transitions in chiral Ge2${\rm Ge}_2$Sb2${\rm Sb}_2$Te5${\rm Te}_5$ (GST) nanohelices for high‐speed optical modulation of chirality and dynamic control of the state of polarization (SOP). The chiral nanostructures are fabricated using a highly directional, wafer‐scale physical vapor deposition ...
Joshua A. Burrow, Md Shah Alam, Riad Yahiaoui, Evan M. Smith, Ryan Laing, Jules Gardener, Thomas A. Searles, Piyush J. Shah, Shivashankar Vangala, Joshua R. Hendrickson, Andrew M. Sarangan, Imad Agha   +11 more
wiley   +1 more source

Two Dimensional Parity Check with Variable Length Error Detection Code for the Non-Volatile Memory of Smart Data

Applied Sciences, 2018
This paper proposes a novel technology of memory protection for the Non-Volatile Memory (NVM), applied to smart sensors and smart data. Based on the asymmetry of failure rate between the statuses of bit-0 and bit-1 in the non-volatile memory, as a result
Cihun-Siyong Alex Gong, Yung-Chang Chang, Li-Ren Huang, Chih-Jen Yang, Kung-Ming Ji, Kuen-Long Lu, Jian-Chiun Liou   +6 more
doaj   +1 more source

Electro‐Steric Ion Confinement in Polyelectrolyte Networks for Robust Nonvolatile Artificial Synapse

Advanced Functional Materials, EarlyView.
Polyelectrolyte stoichiometry governs ion transport and retention in electrolyte‐gated synaptic transistors. A PSS‐rich network creates electro‐steric ion confinement that suppresses ion back‐diffusion and stabilizes channel doping, enabling robust nonvolatile synaptic memory, linear weight updates, and low‐energy operation.
Donghwa Lee, Jinbo Kim, Myeongjin An, Jisoo Park, Junho Sung, Eunsung Hwang, Suhwan Seok, Seong‐Min Bak, Jeonghun Kim, Eunho Lee   +9 more
wiley   +1 more source

Non-volatile SRAM memory cells based on ReRAM technology

, 2020
International audienceStatic Random-Access Memories (SRAMs) are very common in today's chip industry due to their speed and power consumption but are classified as volatile memories. Non-Volatile SRAMs (nvSRAMs) combine SRAM features with non-volatility.
Aziza, Hassen, Moreau, Mathieu, Harb, Adnan, Bazzi, Hussein   +3 more
core   +1 more source

A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories [PDF]

, 2012
In spite of the mature cell structure, the memory controller architecture of Multi-level cell (MLC) NAND Flash memories is evolving fast in an attempt to improve the uncorrected/miscorrected bit error rate (UBER) and to provide a more flexible usage ...
C. Zambelli, P. Olivo, Indaco, Marco, Olivo P., M. Indaco, BERTOZZI, Davide, Zambelli, C., Di Carlo, Stefano, Olivo, P., Bertozzi D., P. Prinetto, D. Bertozzi, M. Fabiano, ZAMBELLI, Cristian, OLIVO, Piero, Fabiano, Michele, Prinetto, Paolo Ernesto, S. Di Carlo, Bertozzi, D., Zambelli C.   +19 more
core   +1 more source

Oxidized MoS2‐Based Multifunctional Memristive Hardware for Energy‐Efficient mmWave Signal Processing and In‐Memory Matrix Multiplication

Advanced Functional Materials, EarlyView.
Thermally oxidized MoS2‐based radio‐frequency switches enable a multifunctional platform that unifies broadband RF switching and in‐memory computation. The device achieves a cutoff frequency of 33.2 THz with high energy efficiency and supports hardware‐aware signal processing.
Juho Son, Changwoo Pyo, Sungmoon Park, Yoongi Cho, Seungchan Lee, Myungsoo Kim   +5 more
wiley   +1 more source

ELECTRICAL CHARACTERIZATION, PHYSICS, MODELING AND RELIABILITY OF INNOVATIVE NON-VOLATILE MEMORIES

, 2012
Enclosed in this thesis work it can be found the results of a three years long research activity performed during the XXIV-th cycle of the Ph.D. school in Engineering Science of the Università degli Studi di Ferrara. The topic of this work is concerned
Zambelli, Cristian
core