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Tri-Gate Normally-Off GaN Power MISFET

IEEE Electron Device Letters, 2012
We present a new normally-off GaN transistor-the tri-gate normally-off GaN metal-insulator-semiconductor field- effect transistor (MISFET). Due to the excellent channel control of a new 3-D gate structure, a breakdown voltage of 565 V has been achieved at a drain leakage current of 0.6 μA/mm and Vgs = 0.
Bin Lu, Elison Matioli, Tomás Palacios
openaire   +1 more source

Technologies for normally-off GaN HEMTs

2020
This chapter reviews the current technologies for normally-off GaN-based HEMTs. First, the HEMT "cascode" approach is briefly described, highlighting advantages and limitation of this design.Then, after illustrating the recessed gate HEMT and the fluorinate gate approach, the focus is put on the recessed gate hybrid metal insulator semiconductor high ...
Giuseppe Greco   +3 more
openaire   +1 more source

AlN/GaN heterostructures for normally-off transistors

Semiconductors, 2017
The structure of AlN/GaN heterostructures with an ultrathin AlN barrier is calculated for normally-off transistors. The molecular-beam epitaxy technology of in situ passivated SiN/AlN/GaN heterostructures with a two-dimensional electron gas is developed.
K. S. Zhuravlev   +10 more
openaire   +1 more source

High-voltage bipolar mode JFET with normally off characteristics

IEEE Electron Device Letters, 1985
The first realization of a power vertical JFET operated in the bipolar mode (BJFET) with normally off behavior is reported. The structure combines minority carrier injection from the gate region in the on-state, and lateral pinch-off of the channel, due to the built-in voltage, in the off-state.
BELLONE, Salvatore   +7 more
openaire   +4 more sources

Normally-off type high speed SI-Thyristor

1982 International Electron Devices Meeting, 1982
The design, fabrication, and characterization of a normally-off type static induction thyristor (SIThy) with a surface gate structure were made with an intention to use it in high speed switching at high currents. The device chip had a size of 7 × 10 mm2and included 9,000 channels, where each channel stripe had a width of 1.5 \micro m and a length of ...
Y. Nakamura   +5 more
openaire   +1 more source

Normally-off computing project: Challenges and opportunities

2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC), 2014
Normally-Off is a way of computing which aggressively powers off components of computer systems when they need not to operate. Simple power gating cannot fully take the chances of power reduction because volatile memories lose data when power is turned off. Recently, new non-volatile memories (NVMs) have appeared.
Hiroshi Nakamura   +2 more
openaire   +1 more source

Normally-off GaN MOSFETs on insulating substrate

Solid-State Electronics, 2013
Abstract Several types of GaN MOSFETs with normally-off operation have been fabricated on insulating substrate and evaluated. In recessed-gate GaN MOSFET, the threshold voltage ( V th ) can be easily controlled, but the current drivability is modest and needs to be improved by adopting appropriate device structure and/or process.
Dong-Seok Kim   +9 more
openaire   +2 more sources

GaAs Integrated Logic with Normally-Off MESFETs

Extended Abstracts of the 1978 Conference on Solid State Devices, 1978
The normally-off GaAs MESFET digital integrated circuits which feature power dissipation as low as 0.2 mW per gate and sub-nanosecond delay time have been developed. To investigate the power-speed performance of the ICs, ring oscillators with different fan-in/fan-out have been fabricated. For fan-in/fan-out = 1/1 , a propagation delay time is typically
Katsuhiko Suyama   +2 more
openaire   +1 more source

Technologies for Realizing Normally-Off Computing

2017
Normally-off computing relies on device technologies, architectural and activity management technologies. To realize normally-off computing systems, details of each technology should be studied. Device technologies provide component that has as small BET as possible by minimizing energy overhead. Architectural technologies combined several devices that
Takashi Nakada   +4 more
openaire   +1 more source

250°C operation normally-off GaN MOSFETs

Solid-State Electronics, 2007
Abstract We tried normally-off operation GaN metal–oxide–semiconductor field effect transistors (MOSFETs). n+ Contact layers as a source and drain region were fabricated using a Si ion implantation technique with the activation annealing at 1300 °C for 30 s in Ar ambient.
Yuki Niiyama   +4 more
openaire   +1 more source

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