Results 91 to 100 of about 31,431,766 (171)
Development, Demonstration, and Device Physics of FET-Accessed One-Transistor GaAs Dynamic Memory Technologies [PDF]
The introduction of digital GaAs into modem high-speed computing systems has led to an increasing demand for high-density memory in these GaAs technologies.
Cooper, J. A., Jr. +2 more
core +1 more source
In this work, we demonstrated a robust 2D MoS2 based iontronic memtransistor of planar architecture operated under the influence of an electrical double layer with versatile performance and applications, including pinched hysteresis nature of transfer curve, analogue channel conductance tuning, low‐voltage operation, logic‐gate operation, classical ...
Puranjay Saha +2 more
wiley +1 more source
Learning Work Function via Implicit Reasoning on Electrostatic Potential Landscapes
StructPot‐CLR establishes a cross‐modal contrastive learning framework that aligns the crystal structures of 2D materials with plane‐averaged electrostatic potential landscapes for physically informed work‐function prediction. The model achieves an MAE of 0.265 eV and an R2 of 0.902 on the held‐out test set while accurately preserving key morphological
Haoyu Wan, Yue Wu, Tianhao Su, Deng Pan
wiley +1 more source
A damage‐free iCVD fluoropolymer passivation strategy is introduced for ambipolar vertical OECTs. Vapor‐phase infiltration and thermal annealing induce nanoscale phase separation in the OMIEC channel, enhancing overall device performance. A single‐channel bipolar event‐driven spiking encoder is also demonstrated for electrocardiogram signal encoding ...
Junyeong Yang +7 more
wiley +1 more source
As CMOS technology approaches fundamental energy limits, new paradigms for low‐power information processing are required. Magnetic systems are attractive for their spin transport, yet current‐induced magnetization control is energy inefficient. Multiferroic heterostructures enable energy‐efficient electric field manipulation of magnetism.
Donghyeon Lee +3 more
wiley +1 more source
From Sensing Mechanisms to System Co‐Design: Graphene‐Based Sensors and Readout Circuits
This review establishes a unified PS–EQ–RF framework linking graphene sensing mechanisms, native electrical outputs, and output‐specific readout circuits. Voltage‐, current‐, resistance‐, and capacitance‐type sensing systems are systematically classified to guide architecture selection, low‐noise design, system co‐design, and practical integration ...
Jinduo Zhang +5 more
wiley +1 more source
A Reconfigurable Memristive Spiking Neuron Enabling Advanced Neuromorphic Computing
Pek Jun Tiw and co‐workers develop a reconfigurable memristive neuron that can exhibit four spiking behaviors with freely tunable spike train parameters. The neuron supports multiplexed spike encoding of multiple pieces of information. It also supports advanced neural network strategies, such as neural heterogeneity and dynamic mode switching ...
Pek Jun Tiw +6 more
wiley +1 more source
Wafer‐Scale 3D Integration for High‐Density Multi‐Valued Neuromorphic Logic
Wafer‐scale 3D vertically integrated multi‐valued logic (MVL) circuits are realized by monolithically integrating a Te/IGZO heterojunction FET with an engineered Te pull‐up FET. Heterointerface‐mediated transport and optimized current matching enable stable ternary operation, while vertical stacking reduces circuit footprint and interconnect complexity,
Chang‐Hyeon Kim +5 more
wiley +1 more source
Probabilistic Computing via Gate‐Tunable Random Telegraph Noise
Intrinsic random telegraph noise in metal–oxide–semiconductor field‐effect transistors is harnessed to create gate‐tunable probabilistic bits. By modulating carrier‐trapping dynamics, the device produces stochastic binary outputs with a continuous bias‐to‐probability transfer.
Gyungwon Yun +8 more
wiley +1 more source
This thesis is mainly proposed and discussed the characteristics of novel capacitor-less one-transistor dynamic random access transistor (1T-DRAM) with additional pseudo-neutral body region.
Lin , Po-Hsieh
core

