Results 41 to 50 of about 10,280 (293)
Parasitic gate capacitance model for triple-gate finfets [PDF]
Triple-gate FinFETs have demonstrated to be promising candidates to push further the performance limits of the microelectronics industry, thanks to their high immunity to short-channel effects.
Raskin, Jean-Pierre +4 more
core +1 more source
Low Parasitic Capacitance and Low-Power CMOS Capacitive Fingerprint Sensor [PDF]
[[abstract]]In this paper, a low parasitic capacitance and low-power CMOS capacitive fingerprint sensor readout circuit is presented. The side effect of parasitic capacitance has been under control with novel layout structure in sensor cell, and minimal ...
Huang, YC, 黃彥中
core +4 more sources
Edible electronics needs integrated logic circuits for computation and control. This work presents a potentially edible printed chitosan‐gated transistor with a design optimized for integration in circuits. Its implementation in integrated logic gates and circuits operating at low voltage (0.7 V) is demonstrated, as well as the compatibility with an ...
Giulia Coco +8 more
wiley +1 more source
Reduction of Parasitic Capacitance in Vertical MOSFETs by Spacer Local Oxidation [PDF]
Application of double gate or surround-gate vertical metal oxide semiconductor field effect transistors (MOSFETs) is hindered by the parasitic overlap capacitance associated with their oayout, which is considerably larger than for a lateral MOSFET on the
Ashburn, Peter +11 more
core
Dissecting Parasitic Capacitance in Nanosheet FETs: An Analytical Perspective [PDF]
This work presents an approach to extract and analytically model the parasitic capacitance components in Nanosheet FETs. Along with parallel and fringing components, the junction capacitance which is a significant contributor to the total parasitic ...
A.K., Singh, Aishwarya K. +2 more
core +1 more source
The Correct Equation for the Current Through Voltage-Dependent Capacitors
Two different equations for the current through voltage-dependent capacitances are used in the literature. One equation is obtained from the time derivative of charge that is considered as capacitance-voltage product: dQ/dt = d[C(V )V ]/dt = C(V)[dV /dt]
Utkarsh Jadli +5 more
doaj +1 more source
Parasitic capacitance cancellation in filter inductors [PDF]
This paper introduces a technique for improving the high-frequency performance of filter inductors and common-mode chokes by cancelling out the effects of parasitic capacitance. This technique uses additional passive components to inject a compensation current that cancels the parasitic current, thereby improving high-frequency filtering performance ...
Neugebauer, Timothy C. +1 more
openaire +3 more sources
Shellac, a centuries‐old natural resin, is reimagined as a green material for flexible electronics. When combined with silver nanowires, shellac films deliver transparency, conductivity, and stability against humidity. These results position shellac as a sustainable alternative to synthetic polymers for transparent conductors in next‐generation ...
Rahaf Nafez Hussein +4 more
wiley +1 more source
Comprehensive Study of Parasitic Capacitance in CFETs: An Analytical Perspective [PDF]
This work presents a comprehensive study on parasitic capacitance and its corresponding analytical model for complementary field-effect transistor (CFET) devices.
Maheshwari, Om +3 more
core +1 more source
Oxygen‐tunnel (OT) indium tin oxide (ITO) vertical channel transistors (VCTs) enable reliable, high‐density gain‐cell memory for monolithic 3D integration. A sandwiched SiN/SiO2/SiN OT stack selectively regulates oxygen transport, suppressing parasitic electrode oxidation while stabilizing channel oxygen vacancies, thereby suppressing carrier injection
Hyeonho Gu +17 more
wiley +1 more source

