Results 21 to 30 of about 4,801,356 (217)
Combined effect of loop delay and reference clock jitter in first-order digital bang-bang phase-locked loops [PDF]
, 2009 Paper presented at the IEEE International Symposium on Circuits and Systems (ISCAS), Taipei, Taiwan, 24-27 May 2009Recently, several digital phase-locked loops (DPLLs) have been demonstrated to achieve the jitter performance of traditional charge-pump ...
Tertinek, Stefan +3 more
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Understanding of the Coherent Demodulation with Phase-Locked Loop
MATEC Web of Conferences, 2018 The phase-locked loop (PLL) technology is a very important technology in the communication field. With the development of electronic technology toward digitalization, the phase-locked processing of signal needs to be realized in digital way.
Zhai Bingcong
doaj +1 more source
An all-digital phase-locked loop based on variable phase accumulator
Dianzi Jishu Yingyong, 2019 This paper presents a novel all-digital phase-locked loop with variable phase accumulator circuit structure. The design of the system is completed by using EDA technology, and the system simulation experiment is carried out by using ModelSim software ...
Yang Mengwei, Tian Fan, Shan Changhong
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Phase-Locked Loop with Inverse Tangent based Phase Detection
Advances in Electrical and Computer Engineering, 2021 In this paper, a novel closed-loop synchronization algorithm is proposed based on the linear phase angle detection. The linear phase detection is performed by the inverse tangent (atan2) trigonometric function, while the frequency tracking is performed
STOJIC, D.
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, 2021 The main purpose of this project was to design a PLL circuit which can be locked at 1GHZ with four factors of frequency division (10, 20, 40 and 80).
Kassem, Ayoub Jr
core
A design methodology to enable sampling PLLs to synthesise fractional-N frequencies [PDF]
, 2011 A novel design methodology is proposed to enable sampling phase-locked loops (SPLL) to synthesise fractional-N frequencies. To date, SPLL can only generate integer-N frequencies.
Xu, Tao +2 more
core +2 more sources
A Single-Event-Hardened Scheme of Phase-Locked Loop Microsystems for Aerospace Applications
Micromachines, 2022 In order to improve the ability of the phase-locked loop (PLL) microsystem applied in the aerospace environment to suppress the irradiation effect, this study presents an efficient charge pump hardened scheme by using the radiation-hardened-by-design ...
Qi Xiang, Hongxia Liu, Yulun Zhou
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A grid frequency estimation method based on moving average filter half-tangent phase-locked loop
Diance yu yibiaoThis paper proposes a half-tangent phase-locked loop (HTan-PLL) with a moving average filter (MAF) for estimating grid frequency. The proposed PLL utilizes a half-tangent phase detector (PD) and introduces MAF into the phase-locked loop to address ...
WANG Wenguo, ZHANG Ben
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IEEE Access, 2023 The study of stability criterion and interaction analysis for grid-connected inverter under weak grid is of great value. The previous stability criterion combined current loop, phase-locked loop and other loops together, and used the same external ...
Fang Liu +4 more
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Radar Waveform Generator with Fuzzy Frequency Regulation [PDF]
International Journal of Telecommunications: The Phase-Locked Loop (PLL) is a common functional component in many electrical systems. Phase-locked loops (PLLs) are closed-loop feedback-driven devices producing a signal depending on the frequency and phase of reference sig-nal that comes in.
Ahmed Salem +2 more
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