Results 31 to 40 of about 4,801,356 (217)
Design of wind power grid-connected monitoring system based on DSP data collection
Distributed new energy power generation is highly valued for avoiding energy consumption caused by long distance transmission. As a grid-accessed supporting product, grid-connected controllers enjoy a large market demand.Based on the grid-accessed ...
ZHU Jianhong, GU Juping, REN Haofeng, CHEN Zeyu
doaj +1 more source
Binary phase detector gain in bang-bang phase-locked loops with DCO jitter [PDF]
Bang-bang phase-locked loops (BBPLLs) are hard nonlinear systems due to the nonlinearity introduced by the binary phase detector (BPD). In the presence of jitter, the nonlinear loop is typically analyzed by linearizing the BPD and applying linear ...
Gleeson, James +5 more
core +1 more source
FPGA implementation of impedance-compensated phase-locked loop for HVDC converters
The phase-locked loop (PLL) plays a key role in HVDC systems. Recently, a new type of PLL called the impedance-compensated phase-locked loop (IC-PLL) was introduced to compensate for the voltage drop across the AC network's Thevenin impedance, making the
Yue Yi +2 more
doaj +1 more source
This paper reports a millimeter (mm)-wave type-II dual-loop phase-locked loop (PLL) with low-power and low-complexity design for improving jitter-power performance and power efficiency.
Zunsong Yang +4 more
doaj +1 more source
A Generative Neuro‐Symbolic AI for Protein Sequence Design
We introduce EffieDes, a neuro‐symbolic framework coupling deep learning‐based fitness landscape parameterization with exact automated reasoning. Unlike greedy sampling, EffieDes identifies sequences that globally optimize fitness while satisfying intricate design constraints.
Marianne Defresne +12 more
wiley +1 more source
High‐Temperature Magnetic Field Mapping Using a Single‐Crystal Diamond MEMS Resonator Array
A single‐crystal diamond MEMS resonator array enables magnetic‐field reconstruction with millisecond response, nanotesla level magnetic noise, and stable operation up to 573 K. Two‐ and three‐dimensional magnetic field mapping are demonstrated using ΔEeffect sensing, highlighting the potential of diamond MEMS technology for hightemperature magnetic ...
Zilong Zhang +4 more
wiley +1 more source
Design of a fast-acquisition phase-locked loop for frequency control systems
Phase-locked loop (PLL) is a negative feedback control system that can achieve phase synchronization of two signals. Its filtering effect can make its passband narrow, and its output frequency automatically track the input frequency.
Chang Jian +4 more
doaj +1 more source
A co‐designed implicit‐reset phase‐frequency detector (PFD) and nonlinear amplifier‐assisted charge pump (CP) achieve dead zone‐free operation from 10 MHz to 4.7 GHz with < 0.5% current mismatch without calibration, enabling −80 dBc of reference spur and 0.50 ps of RMS jitter in a 180 nm of CMOS PLL.
A. Ghaemnia +3 more
wiley +1 more source
A novel phase-locked loop applied on frequency fluctuation of EAST power supply
The excellent performance of synchronous phase locked technology is the basis of improving the power quality of Experimental Advanced Superconducting Tokamak (EAST) power system.
Liang Tan +6 more
doaj +1 more source
A Comprehensive Review of Fault‐Current Limiter Technologies for Smart and Resilient Power Systems
This review compares superconducting, solid‐state, and hybrid fault‐current limiters (FCLs) for modern alternating current, direct current, and hybrid grids. It shows that optimal FCL selection depends on fault characteristics, network configuration, voltage level, protection coordination, and resilience requirements rather than on a universally ...
Abdelrahman Farghly +5 more
wiley +1 more source

