Results 71 to 80 of about 2,094 (182)

DESIGN OF LOW POWER PHASE LOCKED LOOP (PLL) USING 45NM VLSI TECHNOLOGY

, 2023
Power has become one of the most important paradigms of design convergence for multi gigahertz communication systems such as optical data links, wireless products, microprocessor & ASIC/SOC designs. POWER consumption has become a bottleneck in microprocessor design.
openaire   +1 more source

Sensorless Strategy for Controlling SPMSM Combining Improved Adaptive SMO and Finite-Position-Set PLL

Actuators
In this paper, a sensorless field-oriented vector control (FOC) strategy combining an improved adaptive sliding mode observer (IASMO) and a finite-position-set phase-locked loop (FPS-PLL) is proposed for a surface permanent magnet synchronous motor ...
Xiang Wang, Xu Sun, Liming Deng, Luying Feng, Zhe Yang, Keren Xie, Heng Jin   +6 more
doaj   +1 more source

Compensation characterization of the UPQC system under an improved nonlinear controller based on the MSTOGI-PLL device

Frontiers in Energy Research
To solve the delay problem of a unified power quality conditioner (UPQC) system during the separation of the fundamental positive-order components and to better filter out the DC and harmonic components to realize accurate phase locking, a mixed second ...
Yuting Yu, Yuting Yu, Dan Li, Yanting Chu, Yanting Chu   +4 more
doaj   +1 more source

DESIGN OF ALL DIGITAL PHASE LOCKED LOOP (D-PLL) WITH FAST ACQUISITION TIME

International Journal of Research in Engineering and Technology, 2013
A Digital PLL is designed with improved acquisition time and power efficiency. The implemented D-PLL can operate from 6.54MHz to 105MHz with a power dissipation of is 7.763μW (at 210MHz) with 1.2V supply voltage. The D-PLL is synthesized using cadence RTL compiler in 45nm CMOS process technology.
openaire   +1 more source

Design and simulation optimization of phase-locked loop structure for phase-shifting power supply

AIP Advances
A phase-locked loop (PLL) of a phase-shifting power supply for the power system is designed in this paper. Taking the industrial frequency current as the reference signal, the input and output characteristics of the phase-frequency detector with charge ...
Qingchan Liu, Tengbin Li, Yao Zhong, Cong Lin, Junlin Zhang, Zhengang Zhao   +5 more
doaj   +1 more source

Impedance-Phase and Magnitude Control Method to Improve Stability of Grid-Connected Inverters in Weak Grid

CSEE Journal of Power and Energy Systems
Grid impedance and phase-locked loop (PLL) are critical factors for the stability of the grid-connected inverters (GCIs) in a weak grid. They are the positive feedback control loops formed by PLL in the GCI with grid impedance.
Chunming Tu, Jiayuan Gao, Fan Xiao, Qi Guo, Fei Jiang   +4 more
doaj   +1 more source

A Novel MSPLL-Based Method for Frequency Synthesis in Hydrogen MASER. [PDF]

Sensors (Basel)
Simariya D, Johnson SR, Dharmappa D, Dakkumalla S, Dubey PR, Vasanthakumar RM, Daniel DA, Thirukkodi SG.   +7 more
europepmc   +1 more source

DESIGN OF LOW POWER PHASE LOCKED LOOP (PLL) USING 45NM VLSI TECHNOLOGY

SSRN Electronic Journal
Power has become one of the most important paradigms of design convergence for multi gigahertz communication systems such as optical data links, wireless products, microprocessor & ASIC/SOC designs. POWER consumption has become a bottleneck in microprocessor design.
openaire   +3 more sources

Robust Control of Distribution Static Compensator in Self-Excited Induction Generator-Based Wind Energy Systems Under Sensor Failures and Abnormal Load Conditions. [PDF]

Sensors (Basel)
Özer AS, Karaca H.
europepmc   +1 more source

Design and implementation of a phasor measurement unit using a new measurement technique. [PDF]

Sci Rep
Mohamed SA, Mageed HMA, Arafa OM, Merzban MH, Eteiba MB, Haiba AS.   +5 more
europepmc   +1 more source