Results 61 to 70 of about 2,094 (182)
This study establishes a hybrid microgrid model integrating a Doubly Fed Induction Generator (DFIG), a photovoltaic (PV) array, and a battery energy storage system, and proposes a coordinated control framework. The DFIG regulates DC‐bus voltage through the grid‐side converter and performs maximum power tracking via the rotor‐side converter, while the ...
Chunyan Li +4 more
wiley +1 more source
Data Driven Second Integral Sliding Mode Control for the Digital Phase-Locked Loop
The high accuracy and flexibility of the digital phase-locked loop (DPLL) make it a versatile tool with a wide range of applications in modern sensor technology.
Haiqin Liu +4 more
doaj +1 more source
The DFM Control System Based on PLL
A specific structure of control system with double fed machine (DFM) is studied in the paper. The DFM is assumed to be a generator with stator winding connected to the power grid and it produces active and reactive powers.
Andrzej Popenda
doaj +1 more source
Adaptive Gain Control Method of a Phase-Locked Loop for GNSS Carrier Signal Tracking
The global navigation satellite system (GNSS) has been widely used in both military and civil fields. This study focuses on enhancing the carrier tracking ability of the phase-locked loop (PLL) in GNSS receivers for high-dynamic application. The PLL is a
Zhibin Luo, Jicheng Ding, Lin Zhao
doaj +1 more source
Theoretical Modeling and Simulation of Phase-Locked Loop (PLL) for Clock Data Recovery (CDR)
Modern communication and computer systems require rapid (Gbps), efficient and large bandwidth data transfers. Agressive scaling of digital integrated systems allow buses and communication controller circuits to be integrated with the microprocessor on the same chip.
Zainab Mohamad Ashari +1 more
openaire +4 more sources
A phase-locked loop (PLL) circuit is the central component of frequency modulation atomic force microscopy (FM-AFM). However, its response speed is often insufficient, and limits the FM-AFM imaging speed.
Kazuki Miyata, Takeshi Fukuma
doaj +1 more source
Performance Improvement of Quasi-Type-1 PLL by using a Complex Notch Filter
The synchronous reference frame phase-locked loop (SRF-PLL) is widely used for synchronization applications. However, it suffers from a poor performance under unbalanced and distorted grid conditions.
Yunlu Li +4 more
doaj +1 more source
Nonlinear optimized Fast Locking PLLs Using Genetic Algorithm
— This paper presents a novel approach to obtain fast locking PLL by embedding a nonlinear element in the loop of PLL. The nonlinear element has a general parametric Taylor expansion.
H. Miar- Naimi, M. Zabihi
doaj
IMPLEMENTASI PHASE LOCKED LOOP (PLL) PADA PEMANCAR FM STEREO MENGGUNAKAN DSP PLL QN8027
Pemancar FM merupakan salah satu media komunikasi yang efektif untuk menyampaikan pesan berita serta hiburan dimasyarakat, pemancar FM bekerja dengan merubah satu atau lebih sinyal input, berupa frekuensi audio yang diproses menjadi gelombang termodulasi menjadi siyal RF sebagai output daya, kemudian disalurkan ke sistem antena untuk dipancarkan ...
Aris Subhan +2 more
openaire +1 more source

