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High Reliability of Ultrathin Improved SiN on Poly Si
Extended Abstracts of the 1989 International Conference on Solid State Devices and Materials, 1989Ultrathin, improved SiN film, which was formed by removing the top oxide from SiO2/SiN stacked dielectric film on poly-Si, was investigated in terms of electrical properties. As a result, the ultrathin, improved SiN (top-oxide-removed SiN; T.O.R.SiN) revealed 3.8 nm SiO2 equivalent thickness and was superior to SiO2/SiN in TDDB (time dependent ...
Hisakazu Miyatake +3 more
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Advanced sacrificial poly-Si technology for fluidic systems
Journal of Micromechanics and Microengineering, 2001Sacrificial poly-Si etching can be used to create thin cavities and channels. By combining it with anisotropic KOH etching of a mono-Si substrate, important components for fluidic systems, like V-grooved channels, thin sandwiched channels, channel crossings and membrane filters and injectors, have been fabricated in a single etch step.
Berenschot, J.W. +4 more
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2013
This chapter deals with the electrical characterisation, and related performance issues, of poly-Si TFTs. The subjects covered include an analytical model for conduction in poly-crystalline material, issues with the measurement of the poly-Si DOS, low field and high field leakage current behaviour, and an overview of the bias stress instability ...
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This chapter deals with the electrical characterisation, and related performance issues, of poly-Si TFTs. The subjects covered include an analytical model for conduction in poly-crystalline material, issues with the measurement of the poly-Si DOS, low field and high field leakage current behaviour, and an overview of the bias stress instability ...
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Capacitorless 1T-DRAM on Crystallized Poly-Si TFT
Journal of Nanoscience and Nanotechnology, 2011The single-transistor dynamic random-access memory (1T-DRAM) using a polycrystalline-silicon thin-film transistor (poly-Si TFT) was investigated. A 100-nm amorphous silicon thin film was deposited onto a 200-nm oxidized silicon wafer via low-pressure chemical vapor deposition (LPCVD), and the amorphous silicon layer was crystallized via eximer laser ...
Min Soo, Kim, Won Ju, Cho
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2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, 2012
In this paper, we propose a new block-oxide source/drain-tied (BOSDT) poly-Si TFT in which the additional poly-Si body (APSB) is created when the device isolation process is done after the source/drain implantation and dopant activation. For the first time, according to our results, the APSB is confirmed to have the ability to circumvent the SCEs and ...
Yi-Chuen Eng +2 more
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In this paper, we propose a new block-oxide source/drain-tied (BOSDT) poly-Si TFT in which the additional poly-Si body (APSB) is created when the device isolation process is done after the source/drain implantation and dopant activation. For the first time, according to our results, the APSB is confirmed to have the ability to circumvent the SCEs and ...
Yi-Chuen Eng +2 more
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Poly-Si - A Most Important Material
MRS Proceedings, 1990AbstractThe many advantages of polycrystalline Si (poly-Si) to semiconductor device manufacturing are reviewed, together with methods of deposition and new uses.
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Cost Worthy and High Performance LSTP CMIS; Poly-Si/HfSiON nMIS and Poly-Si/TiN/HfSiON pMIS
2006 International Electron Devices Meeting, 2006High performance LSTP CMISFETs with poly-Si/TiN hybrid gate and high-k dielectric have been studied. Gate depletion is successfully sup-pressed by in-situ phosphorus doped poly-Si gate for NMIS and by TiN metal gate for PMIS. Vth control for pMIS is accomplished by fluorine implantation into substrate.
T. Hayashi +17 more
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Depletion Layer of Gate Poly-Si
IEEE Transactions on Electron Devices, 2005The depletion effects of gate poly-Si are investigated in detail taking into consideration the fact that many-body effects due to carrier-carrier and carrier-ion interactions are different at the surface than in a bulk of the gate poly-Si. All calculations are self-consistently performed including an incomplete ionization of activated impurities in an ...
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MRS Proceedings, 1995
ABSTRACTOxygen plasma treatment was performed on the excimer laser annealed poly-Si surface, followed by gate oxide deposition with low pressure chemical vapor deposition (LPCVD) in order to control the threshold voltage of excimer laser annealed poly-Si thin film transistors (TFTs).Threshold voltages of n-channel TFTs increase from 0.4 to 2.8 V by ...
Jae-Ik Woo +4 more
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ABSTRACTOxygen plasma treatment was performed on the excimer laser annealed poly-Si surface, followed by gate oxide deposition with low pressure chemical vapor deposition (LPCVD) in order to control the threshold voltage of excimer laser annealed poly-Si thin film transistors (TFTs).Threshold voltages of n-channel TFTs increase from 0.4 to 2.8 V by ...
Jae-Ik Woo +4 more
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ECS Meeting Abstracts, 2010
Abstract not Available.
Sung-Hwan Choi, Min-Koo Han
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Abstract not Available.
Sung-Hwan Choi, Min-Koo Han
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