Results 281 to 290 of about 5,609,086 (296)

Low Power Finite State Machine Synthesis Using Power-Gating

The Integration VLSI Journal, 2011
Santanu Chattopadhyay, Sambhu Nath Pradhan   +1 more
exaly  

Determination of Power Gating Granularity for FPGA Fabric

2006
Tim Tuan, Arifur Rahman
exaly  

The Optimal Fan-Out of Clock Network for Power Minimization by Adaptive Gating

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2012
Shmuel Wimer, Israel Koren
exaly  

Low-Power FSM Synthesis Based on Automated Power and Clock Gating Technique

Journal of Circuits, Systems and Computers, 2019
Abhishek Nag, Sambhu Nath Pradhan
exaly  

Two-Dimensional Signal Gating for Low-Power Array Multiplier Design

2002
M D Ercegovac
exaly  

Adaptive Clock Gating Technique for Low Power IP Core in SoC Design

2007
Zhimin Zhang
exaly  

Power Gating Overview

2007
openaire   +1 more source

A Power Gating Example

2007
openaire   +1 more source

The Merged Clock Gating Architecture for Low Power Digital Clock Application on FPGA

2018
exaly  

Designing Power Gating

2007
openaire   +1 more source