A New Technology for Reducing Dynamic Power Consumption in 8-Bit ALU Design
Iraqi Journal of Industrial Research, 2022 Clock gating is an effective way to decrease dissipated power in synchronous design. The most effective way to do this is by masking the clock that turns toward the unused part of design.
Ahmed Lateef Hameed +2 more
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Modeling the effects of cell cycle M-phase transcriptional inhibition on circadian oscillation. [PDF]
PLoS Computational Biology, 2008 Circadian clocks are endogenous time-keeping systems that temporally organize biological processes. Gating of cell cycle events by a circadian clock is a universal observation that is currently considered a mechanism serving to protect DNA from diurnal ...
Bin Kang +4 more
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LNKs-RVEs complex ticks in the circadian gating of plant temperature stress responses
Stress Biology, 2023 Recently, Kidokoro et al. found that protein complex LNK3,4-RVE4,8 and LNK1,2-RVE4,8 of the circadian clock modulates plant cold- and high-temperature tolerance, respectively. Here, we reviewed the discovery of LNKs, the dynamically formed morning-phased
Xiaodong Xu, Qiguang Xie
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Implementation of Clock Gating for Power Optimizing in Synchronous Design
Tikrit Journal of Engineering Sciences, 2018 Huffman coding is very important technique in information theory. Compression technique is the technology for reducing the amount of data used to denote any content without decreasing the quality.
Hussein Shakor Mogheer +1 more
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Power Optimization For Multi-Core Memory Controller Using Intelligent Clock Gating Technique [PDF]
Journal of Electrical and Electronics Engineering, 2022 The demand for low-power digital systems is increasing daily, especially for the multi-core design on SoC. Different IP cores of the existing multi-core memory controller need to communicate to achieve specific tasks on the same die.
NOAMI Ahmed +2 more
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Genome-wide circadian gating of a cold temperature response in bread wheat.
PLoS Genetics, 2023 Circadian rhythms coordinate the responses of organisms with their daily fluctuating environments, by establishing a temporal program of gene expression. This schedules aspects of metabolism, physiology, development and behaviour according to the time of
Calum A Graham +3 more
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A power-efficient pipeline based clock gating FIFO for a dual ported memory array [PDF]
Songklanakarin Journal of Science and Technology (SJST), 2023 A FIFO is a special type of buffer that controls the data flow between the sender and receiver. It is used to monitor the serial data flow and to avoid mismatch conditions.
S. Dhanasekar +3 more
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Robust, coherent, and synchronized circadian clock-controlled oscillations along Anabaena filaments
eLife, 2021 Circadian clocks display remarkable reliability despite significant stochasticity in biomolecular reactions. We study the dynamics of a circadian clock-controlled gene at the individual cell level in Anabaena sp.
Rinat Arbel-Goren +9 more
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CMOS Technology for Increasing Efficiency of Clock Gating Techniques Using Tri-State Buffer
Walailak Journal of Science and Technology, 2016 Clock gating is an effective technique of decreasing dynamic power dissipation in synchronous design. One of the methods used to realize this goal is to mask the clock which goes to the unnecessary to use in specific time.
Maan HAMEED +3 more
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Towards self-clocked gated OCDMA receiver [PDF]
Journal of the European Optical Society-Rapid Publications, 2013 A novel incoherent OCDMA receiver with incorporated all-optical clock recovery for self-synchronization of a time gate for the multi access interferences (MAI) suppression and minimizing the effect of data time jitter in incoherent OCDMA system was ...
Idris S., Osadola T., Glesk I.
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