Results 11 to 20 of about 227,711 (205)

Power-Clock-Gating in adiabatischen Logikschaltungen [PDF]

open access: yesAdvances in Radio Science, 2006
In statischen CMOS-Schaltungen wird Clock-Gating verwendet, um inaktive Schaltungsgruppen abzuschalten und damit dynamische Verluste zu reduzieren. Leckströme gewinnen in den neuen Technologien zunehmend an Bedeutung, und statische Verluste treten auf ...
Ph. Teichmann   +3 more
doaj   +2 more sources

Loss of circadian protection against influenza infection in adult mice exposed to hyperoxia as neonates

open access: yeseLife, 2021
Adverse early-life exposures have a lasting negative impact on health. Neonatal hyperoxia that is a risk factor for bronchopulmonary dysplasia confers susceptibility to influenza A virus (IAV) infection later in life. Given our previous findings that the
Yasmine Issah   +11 more
doaj   +1 more source

Feto-Maternal Crosstalk in the Development of the Circadian Clock System

open access: yesFrontiers in Neuroscience, 2021
The circadian (24 h) clock system adapts physiology and behavior to daily recurring changes in the environment. Compared to the extensive knowledge assembled over the last decades on the circadian system in adults, its regulation and function during ...
Mariana Astiz, Henrik Oster
doaj   +1 more source

Sub-Clock Power-Gating Technique for Minimising Leakage Power During Active Mode

open access: yes, 2011
This paper presents a new technique, called sub-clock power gating, for reducing leakage power in digital circuits. The proposed technique works concurrently with voltage and frequency scaling and power reduction is achieved by power gating within the ...
Hill, Stephen   +3 more
core   +2 more sources

Low Power QC-LDPC Decoder Based on Token Ring Architecture

open access: yesEnergies, 2020
The article presents an implementation of a low power Quasi-Cyclic Low-Density Parity-Check (QC-LDPC) decoder in a Field Programmable Gate Array (FPGA) device. The proposed solution is oriented to a reduction in dynamic energy consumption.
Mateusz Kuc   +2 more
doaj   +1 more source

Introducing KeyRing self‐timed microarchitecture and timing‐driven design flow

open access: yesIET Computers & Digital Techniques, 2021
A self‐timed microarchitecture called KeyRing is presented, and a method for implementing KeyRing circuits compatible with a timing‐driven electronic design automation (EDA) flow is discussed.
Mickael Fiorentino   +2 more
doaj   +1 more source

Design of Spectrum Processing Chiplet Based on FFT Algorithm

open access: yesMicromachines, 2023
With the rapid development of electronic information and computer science, the fast Fourier transform (FFT) has played an increasingly important role in digital signal processing (DSP).
Baoping Meng   +2 more
doaj   +1 more source

Dispersion insensitive, high-speed optical clock recovery based on a mode-locked laser diode [PDF]

open access: yes, 2008
An investigation into the effects of varying levels of chromatic dispersion on a mode- locked laser diode optical clock recovery process is presented.
A. O'Hare   +29 more
core   +2 more sources

Demonstration of a 64-chip OCDMA system using superstructured fiber gratings and time-gating detection [PDF]

open access: yes, 2001
We investigate the benefits of using time-gating detection in an optical code-division multiple access (OCDMA) system that comprises bipolar 64-chip long superstructure fiber Bragg grating encoders and decoders. Transmission of the codes is demonstrated,
Teh, P.C.   +6 more
core   +1 more source

An Equal Precision Programmed Cymometer Design Using Low-Power Technique

open access: yesApplied Sciences, 2023
Based on equal precision frequency measurement and pulse counting technique, a multi-period synchronous frequency measurement method is proposed in this paper. A programmed cymometer is designed with a full frequency band with equal precision measurement
Yuan Liu   +9 more
doaj   +1 more source

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