Results 251 to 260 of about 207,528 (316)

Optimal compilation strategies for QFT circuits in neutral-atom quantum computing. [PDF]

Sci Rep
Gao D, Li Y, Ying S, Li S.
europepmc   +1 more source

A Prospective Multicenter Study on the Performance of a Bone-Anchored Hearing Implant Using Minimally Invasive Ponto Surgery. [PDF]

Otol Neurotol
Coelho DH, Daniel SJ, Altuna X, Kutz WJ, Copeland B, Kim HH, Wazen JJ, Amichetti NM, Petersson U, Håkansson MÅ.   +9 more
europepmc   +1 more source

High-capacity directional information processor using all-optical multilayered neural networks. [PDF]

Sci Adv
Wang G, Zang X, Zhang T, Tan Z, Tan Z, Guo Z, Zhu Y, Chen X, Zhuang S.   +8 more
europepmc   +1 more source

Measuring central charge on a universal quantum processor. [PDF]

Nat Commun
Köylüoğlu NU, Majumder S, Amico M, Mostame S, van den Berg E, Rajabpour MA, Minev Z, Najafi K.   +7 more
europepmc   +1 more source

Loop parallelization in source code for internet of things computing using hybrid heuristic algorithm. [PDF]

PLoS One
Arasteh B, Sefati SS, Kusetogullari H, Kiani F, Sorooshian S, Babaee Tirkolaee E.   +5 more
europepmc   +1 more source

Middle Fossa Dura Implantation of the Bonebridge in Children With Craniofacial Malformations: A Case Report. [PDF]

Cureus
Sousa Menezes A, Breda M, Ferreira F, Gouveia M, Ribeiro D, Dias L.   +5 more
europepmc   +1 more source

EXPRESSION OF CONCERN: DIMP53‐1: A Novel Small‐Molecule Dual Inhibitor of p53–MDM2/X Interactions with Multifunctional p53‐Dependent Anticancer Properties

Molecular Oncology, EarlyView.
wiley   +1 more source

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The Microarchitecture of the Synergistic Processor for a Cell Processor

IEEE Journal of Solid-State Circuits, 2006
This paper describes an 11 FO4 streaming data processor in the IBM 90-nm SOI-low-k process. The dual-issue, four-way SIMD processor emphasizes achievable performance per area and power. Software controls most aspects of data movement and instruction flow to improve memory system performance and core performance density. The design minimizes instruction
S H Dhong, J Leenstra
exaly   +2 more sources

Multithreaded Processors

The Computer Journal, 2002
Summary: The instruction-level parallelism found in a conventional instruction stream is limited. Studies have shown the limits of processor utilization even for today's superscalar microprocessors. One solution is the additional utilization of more coarse-grained parallelism.
Ungerer, Theo, Robič, Borut, Šilc, Jurij   +2 more
openaire   +2 more sources