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A Study in Microprogrammed Processors: A Medium Sized Microprogrammed Processor
IEEE Transactions on Computers, 1971A frame of reference is established for evaluating the various philosophies or approaches to the microprogramming of control logic. Three new measures for analyzing microprogramming philosophies are introduced: "monophase" versus "polyphase," "parallel" versus "serial," and "encode" versus "little encode." The terms monophase, polyphase refer to how ...
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Multi-processor debug in SoC and processor designs
2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT), 2013Summary form only given. New methods and tools need to be provided in designs from SoC through Servers to enable platform developers to quickly debug issues that arise in the development phase. Standard methods should be established for capturing debug data between design elements (IP) to enable triage, debug, and root cause resolution of issues.
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Processor-in-Memory, Reconfigurable, and Asynchronous Processors
1999Processor-in-memory (PIM) or intelligent RAM (IRAM) chips integrate one or more processors with large, high-bandwidth, on-chip DRAM banks, which provide the processor(s) with sufficient bandwidth at a reasonable cost.
Jurij Šilc, Borut Robič, Theo Ungerer
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The Distributed Processor Organization
1969Publisher Summary This chapter presents the results of a research study of advanced multiprocessor organizational concepts for future space mission applications, with particular emphasis on a “distributed processor” organization that provides a very high tolerance of failures. It also discusses the requirements and technology investigations.
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Pre-processor and Post-processor Files
2018This chapter introduces the processor files of the GPenSIM. With the processors, many real-life discrete-event systems could be modeled as Petri nets. The processors also give GPenSIM the flexibility it is well known for and the potential for making hybrid Petri net models by combining Petri nets with the other MATLAB Toolboxes (e.g., Fuzzy Logic ...
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Proceedings International Conference on Dependable Systems and Networks, 2003
null Shih-Chang Lai +3 more
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null Shih-Chang Lai +3 more
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Proceedings of 30th Annual International Symposium on Microarchitecture, 2002
Eric Rotenberg +3 more
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Eric Rotenberg +3 more
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Tradeoffs in processor/memory interfaces for superscalar processors
ACM SIGMICRO Newsletter, 1992openaire +1 more source