Results 221 to 230 of about 40,447 (267)
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Constant transconductance rail to rail amplifier

2004 International Semiconductor Conference. CAS 2004 Proceedings (IEEE Cat. No.04TH8748), 2005
This work presents an analytical model for a CMOS rail to rail gain stage transconductance dependence on the common mode input voltage. The complete transconductance RR amplifier schematic is composed by three functional blocks: the input stage, the summing stage and the bias circuit. This analysis uses MOS transistor basic model.
A. Danchiv, M. Bodea, C. Dan
openaire   +1 more source

A High Speed CMOS Transmitter and Rail-to-Rail Receiver

4th IEEE International Symposium on Electronic Design, Test and Applications (delta 2008), 2008
This paper presents a high speed low voltage differential signal (LVDS) interface circuit for CPU, LCD, FPGA and other fast links. In the proposed transmitter a stable reference and a common mode feedback circuit are applied into the LVDS drivers, which enable the transmitter to tolerate the variations of process, temperature and supply voltage.
Feng Zhang 0014   +5 more
openaire   +1 more source

A rail-to-rail input/output CMOS power amplifier

IEEE Journal of Solid-State Circuits, 1989
A rail-to-rail input/output CMOS amplifier is presented in which the shortcomings presented in previous designs have been eliminated. The small (0.3-mm2) amplifier has an acceptable common-mode rejection ratio (55 dB), valid for the entire common-mode range.
Matthijs D. Pardoen, Marc G. R. Degrauwe
openaire   +1 more source

A rail to rail, slew-boosted pre-charge buffer

2006 IEEE International Symposium on Circuits and Systems, 2006
A pre-charge buffer is designed in a 0.5 /spl mu/m CMOS process. The buffer has rail to rail input capability, and makes use of a slew boosting mechanism, which senses current to enhance slew rate. Sensing current avoids overshoots when the buffer exits the slew-mode.
Huseyin Dine   +3 more
openaire   +1 more source

Class-AB Rail-to-Rail CMOS Analog Buffer

2005 IEEE International Symposium on Circuits and Systems, 2005
In this paper, a low-power rail-to-rail CMOS analog buffer is presented. The circuit is based on an input stage made up of two complementary class AB differential pairs, while a simple additional circuit allows rail-to-rail operation at the output terminal.
Juan M. Carrillo   +3 more
openaire   +1 more source

Rail-to-rail tunable CMOS V-I converter

2006 IEEE International Symposium on Circuits and Systems, 2006
A novel technique is proposed to achieve highly linear programmable voltage-to-current (V-I) converters over a rail-to-rail input range. It employs two passive resistors with one of their terminals tied to a very low impedance node to achieve an almost distortionless V-I conversion for rail-to-rail input signals.
Antonio J. López-Martín   +3 more
openaire   +1 more source

Detection for Rail Surface Defects via Partitioned Edge Feature

IEEE Transactions on Intelligent Transportation Systems, 2022
Jianwei Liu, Chao Wang, Ziji Ma
exaly  

Vibration modes and wave propagation of the rail under fastening constraint

Mechanical Systems and Signal Processing, 2021
Alfredo Nunez, Shaoguang Li, Zili Li
exaly  

A model and methodology for resilience assessment of interdependent rail networks – Case study of Great Britain's rail network

Reliability Engineering and System Safety, 2023
Jim W Hall   +2 more
exaly  

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