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Reduced Instruction Set Computer
1992Seit der Entwicklung der ersten digitalen Rechner wuchs der Umfang und die Komplexitat der Befehlssatze stetig an. So hatte 1948 der MARK I nur sieben Maschinenbefehle geringer Komplexitat wie z.B. Additions- und Sprungbefehle. Nachfolgende Prozessorarchitekturen versuchten, die semantische Lucke (semantic Gap) zwischen hoheren, problemorientierten ...
Wolfram Schiffmann, Robert Schmitz
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SAE Technical Paper Series, 1992
<div class="htmlview paragraph">The intent of this paper will be to address the level of performance and cost of the various complex instruction set computers (CISC-80X86) versus the reduced instruction set computers (RISC). The original concept of reduced instruction set computers will be explained.
Harry Willis, Annette Stasiak
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<div class="htmlview paragraph">The intent of this paper will be to address the level of performance and cost of the various complex instruction set computers (CISC-80X86) versus the reduced instruction set computers (RISC). The original concept of reduced instruction set computers will be explained.
Harry Willis, Annette Stasiak
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The case for the reduced instruction set computer
ACM SIGARCH Computer Architecture News, 1980One of the primary goals of computer architects is to design computers that are more costeffective than their predecessors. Cost-effectiveness includes the cost of hardware to manufacture the machine, the cost of programming, and costs incurred related to the architecture in debugging both the initial hardware and subsequent programs.
David A. Patterson, David R. Ditzel
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Reduced instruction set computer architecture
Proceedings of the IEEE, 1988A tutorial on the reduced instruction set computer (RISC) approach is presented and the key design issues involved in RISC architecture are highlighted. The results of a number of studies on the instruction execution characteristics of compiled high-level-language programs are examined first.
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Reduced instruction set computers
1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1986The infulential computer architects believe that conventional microprocessor architectures have reached a performance limit and represent a dead end in processor evolution. A new approach, the Reduced Instruction Set Computer (RISC) has emerged from research laboratories and is poised to enter the marketplace.
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RISC-(reduced instruction set computers)
IEEE Potentials, 1991The RISC approach to computer design is described. The use of pipelining, a characteristic feature of RISC computers, is discussed. The simple instruction encoding, memory instructions, and optimizing compilers are examined. Implementation, performance, potential disadvantages, and future trends are considered. >
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The research and development of reduced instruction set computer
2011 IEEE 3rd International Conference on Communication Software and Networks, 2011This paper proposed a unified model of computer architecture, data flow-based calculation and structure that flow calculation based on the architecture of a unified calculation of instruction stream-based architecture up CISC and RISC system system that based on the Von Neumann architecture • modern computer system problems and research priorities, and
Ya Liu +3 more
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Microprocessing and Microprogramming, 1988
Abstract For the design of a multiple purpose high performance multiprocessor, it is necessary to combine firmware and software research into a single project. This paper describes the options taken in the multicomputer project at the department INFO of the University of Brussels (VUB).
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Abstract For the design of a multiple purpose high performance multiprocessor, it is necessary to combine firmware and software research into a single project. This paper describes the options taken in the multicomputer project at the department INFO of the University of Brussels (VUB).
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A residue number system reduced instruction set computer (RISC) concept
International Conference on Acoustics, Speech, and Signal Processing, 2003A reduced-instruction-set RNS (residue number system) processor is proposed for digital signal processing algorithms. Issues leading toward a RNS RISC are examined, namely suitable RNS algorithms. It is argued that this is a reasonable next step in RNS research.
M.F. Griffin, F.J. Taylor
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Reduced Instruction Set Computers
1996Two of the best known families of microprocessor are those based on the Motorola 68000 and Intel 8086 architectures, the 680×0 family gaining popularity through its association with the Apple Macintosh and the 80×86 family through association with the original IBM PC.
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