Results 211 to 220 of about 9,109,748 (351)

A multithreading RISC-V implementation for Lagarto Architecture

, 2020
The development of computer architecture standards for many years was mainly delegated to a few groups of companies that define most of the popular Instructions Set Architectures (ISAs). While the Information Technologies field is constructed through many efforts of interfaces resulting in abstraction layers at several levels, the interaction between ...
openaire   +1 more source

Arnold: an eFPGA-Augmented RISC-V SoC for Flexible and Low-Power IoT End-Nodes

, 2020
Pasquale Davide Schiavone, Davide Rossi, Alfio Di Mauro, Frank K. Gürkaynak, Timothy Saxe, Mao Wang, Ket Chong Yap, Luca Benini   +7 more
openalex   +2 more sources

CARE: Lightweight Attack Resilient Secure Boot Architecturewith Onboard Recovery for RISC-V based SOC

, 2021
Avani Dave, Nilanjan Banerjee, Chintan Patel   +2 more
openalex   +2 more sources

Watchdog Monitoring for Detecting and Handling of Control Flow Hijack on RISC-V-based Binaries [PDF]

, 2022
Toyosi Oyinloye, Lee Speakman, Thaddeus Eze, Lucas O’Mahony   +3 more
openalex   +1 more source

Spin–Orbit Coupling‐Regulated Anti‐Kasha Rule for Photoswitchable Catalysis

ENERGY &ENVIRONMENTAL MATERIALS, EarlyView.
Photoswitchable catalysis provides a non‐invasive light‐driven chemical energy conversion processes. Here we comment on a recent work reported spin–orbit coupling‐mediated control over anti‐Kasha photophysical pathways in carbonylated carbon nitride, enabling optically switchable catalytic dynamics.
Ailin Gao, Changchao Jia
wiley   +1 more source

Floating Point HUB Adder for RISC-V Sargantana Processor

HUB format is an emerging technique to improve the hardware and time requirement when round to nearest is needed. On the other hand, RISC-V is an open-source ISA that many companies currently use in their designs.
Bandera, Gerardo, Moreto, Miquel, Salamero, Javier, Villalba, Julio   +3 more
core  

End-to-End QoS for the Open Source Safety-Relevant RISC-V SELENE Platform

, 2022
Pablo Andreu, Carles Hernández, Tomás Picornell, Pedro López-García, Sergi Alcaide, Francisco Bas, Pedro Benedicte, Guillem Cabo, Chang Feng, Francisco Fuentes, Jaume Abella   +10 more
openalex   +2 more sources

OpenASIP 2.0: Co-Design Toolset for RISC-V Application-Specific Instruction-Set Processors [PDF]

, 2022
Kari Hepola, Joonas Multanen, Pekka Jääskeläinen   +2 more
openalex   +1 more source

Nanoplatform‐Enabled Genetic Interventions for Central Nervous System Disorders: Advances in Delivery Strategies and Therapeutic Potential

Advanced Genetics, EarlyView.
This review provides a detailed description of gene mutations and epigenetic mechanisms in central nervous system (CNS) disease, strategies for gene therapy, challenges for CNS gene therapy and gene‐drug nanocarriers. This review also summarizes the applications of nanogenetic therapy platforms in CNS diseases (brain tumors, neurodegenerative diseases,
Fuming Liang, Shizhen Cui, Jing Yang, Zhaohui He, Ling Zhu   +4 more
wiley   +1 more source

Enabling Syscall Intercept for RISC-V

The European Union technological sovereignty strategy centers around the RISC-V Instruction Set Architecture, with the European Processor Initiative leading efforts to build production-ready processors. Focusing on realizing a functional RISC-V ecosystem, the BZL initiative (www.bzl.es) is making an effort to create a software stack along with the ...
Andrić, Petar, Call, Aaron, Nou, Ramon
openaire   +2 more sources