Results 61 to 70 of about 9,109,748 (351)
Experimenting with Emerging RISC-V Systems for Decentralised Machine Learning [PDF]
ACM International Conference on Computing Frontiers, 2023 Decentralised Machine Learning (DML) enables collaborative machine learning without centralised input data. Federated Learning (FL) and Edge Inference are examples of DML.
Gianluca Mittone +12 more
semanticscholar +1 more source
RISC-V: #AlphanumericShellcoding
, 2019 25 pages, originally published at WOOT ...
Barral, Hadrien +3 more
openaire +2 more sources
FAC-V: An FPGA-Based AES Coprocessor for RISC-V
Journal of Low Power Electronics and Applications, 2022 In the new Internet of Things (IoT) era, embedded Field-Programmable Gate Array (FPGA) technology is enabling the deployment of custom-tailored embedded IoT solutions for handling different application requirements and workloads.
Tiago Gomes +4 more
doaj +1 more source
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks [PDF]
IEEE Computer Society Annual Symposium on VLSI, 2023 The emerging trend of deploying complex algorithms, such as Deep Neural networks (DNNs), increasingly poses strict memory and energy efficiency requirements on Internet-of-Things (IoT) end-nodes.
Alessandro Nadalini +7 more
semanticscholar +1 more source
VITAMIN-V: Virtual Environment and Tool-Boxing for Trustworthy Development of RISC-V Based Cloud Services [PDF]
, 2023 VITAMIN-V is a 2023-2025 Horizon Europe project that aims to develop a complete RISC-V open-source software stack for cloud services with comparable performance to the cloud-dominant x86 counterpart and a powerful virtual execution environment for ...
Arelakis, Angelos +23 more
core +1 more source
RISC-V Processor for IOT Applications [PDF]
, 2023 RISC-V is a recently introduced instruction-set architecture (ISA) that offers innovative advantages, including low power consumption, affordability, and scalability.
Rajveer Singh, et al.
core +2 more sources
RISQ-V: Tightly Coupled RISC-V Accelerators for Post-Quantum Cryptography
Transactions on Cryptographic Hardware and Embedded Systems, 2020 Empowering electronic devices to support Post-Quantum Cryptography (PQC) is a challenging task. PQC introduces new mathematical elements and operations which are usually not easy to implement on standard processors.
Tim Fritzmann +2 more
doaj +1 more source
Journal of Low Power Electronics and Applications, 2023 In this manuscript, we propose a configurable hardware device in order to build a coherent data log unit. We address the need for analyzing mixed-criticality systems, thus guaranteeing the best performances without introducing additional sources of ...
Francesco Cosimi +3 more
doaj +1 more source
CIDPro: Custom Instructions for Dynamic Program Diversification
, 2018 Timing side-channel attacks pose a major threat to embedded systems due to their ease of accessibility. We propose CIDPro, a framework that relies on dynamic program diversification to mitigate timing side-channel leakage.
Biswas, Arnab Kumar +4 more
core +1 more source
Porting of eChronos RTOS on RISC-V Architecture [PDF]
, 2020 11 pages, 3 figures, Accepted for Publication for Springer LNCS ...
M. Sridevi +3 more
openaire +3 more sources