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Advanced Noise-Shaping SAR ADC Techniques
2023Noise-Shaping SAR (NS-SAR) ADCs have become prominent in modern precision and low-power data acquisition applications due to their ability to achieve higher resolution with very low hardware overhead. This thesis focuses on breaking the resolution-bandwidth tradeoff in NS-SARs by pushing the noise transfer function (NTF) to higher order.
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Integrated CMOS ADC — Tutorial review on recent hybrid SAR-ADCs
2017 MIXDES - 24th International Conference "Mixed Design of Integrated Circuits and Systems, 2017Recently, SAR-ADC architecture is often used as an integrated ADC architecture in VLSI chip. The advantage of SAR ADC is the non-necessity of high-gain OP amps, low power consumption features, and it's suitability to fine process. On the other hand, disadvantage with simple SAR architecture, however, is its difficulty to achieve high-sampling frequency
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High Performance SAR-ADC Architecture
In a semiconductor process the transit frequency mainly depends on the feature size. To design a high performance analog-to-digital converter (ADC) in a given process the topology must be chosen carefully. Besides the power consumption of the converter also surrounding circuits like reference and input buffers have to be considered in the ...openaire +1 more source
2011
SAR ADC is the best choice for low-power and high-resolution application in signal processing systems, since it is fit to work in midst rate per conversion (MSPS, GSPS). In order to guide trade-off design better, this paper starts with analyzing the advantages and disadvantages of known FoMs (figure of merits) of traditional SAR ADC.
Libin Hu, Wenshi Li
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SAR ADC is the best choice for low-power and high-resolution application in signal processing systems, since it is fit to work in midst rate per conversion (MSPS, GSPS). In order to guide trade-off design better, this paper starts with analyzing the advantages and disadvantages of known FoMs (figure of merits) of traditional SAR ADC.
Libin Hu, Wenshi Li
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Review of SAR ADC Switching Schemes
2016In this chapter, switching schemes commonly employed in SAR ADCs are revisited and compared. A summary indicates that the CS scheme shows compelling features for LVLP applications. Finally, the state of the art in CS-ADCs is reviewed.
Taimur Rabuske, Jorge Fernandes
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Adiabatic Charging in SAR ADCs
Successive Approximation Register (SAR) is an established and well-rounded (Analog-to-Digital Converter) ADC architecture allowing for medium resolution and medium conversion speed while being energy efficient and relatively small in area. Switched-capacitor (Digital-to-Analog Converter) DAC being an essential component of the SAR architecture in ...openaire +1 more source
An asynchronous analog to digital convertor for converting an analog input signal into a digital output is presented. According to an embodiment, the analog to digital convertor comprises a clock input operable to receive an external clock signal having a clock period, a comparator operable to compare the analog input signal to a reference signal, a ...
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Tutorial: Noise-Shaping SAR ADCs
2022 IEEE International Solid-State Circuits Conference (ISSCC), 2022openaire +1 more source