Results 31 to 40 of about 582,151 (290)
Capacitor Mismatch Calibration Technique to Improve the SFDR of 14-Bit SAR ADC [PDF]
This paper presents mismatch calibration technique to improve the SFDR in a 14-bit successive approximation register (SAR) analog-to-digital converter (ADC) for wearable electronics application.
Cen, Yuanjun +5 more
core +1 more source
Noise‐shaping (NS) successive approximation register (SAR) analogue‐to‐digital converters (ADCs) are an attractive architecture for power and area efficiency in moderate resolution and bandwidth applications.
Weihao Wang +3 more
doaj +1 more source
Noise shaping Asynchronous SAR ADC based time to digital converter [PDF]
Time-to-digital converters (TDCs) are key elements for the digitization of timing information in modern mixed-signal circuits such as digital PLLs, DLLs, ADCs, and on-chip jitter-monitoring circuits.
Katragadda, Sowmya
core +1 more source
A ZOOM ADC for Protable Gyroscope
This design is a high precision ZOOM analogtodigital converter (ADC) presented for using in microelectromechanical systems (MEMS) gyroscope sensors The structure consists of a successive approximation (SAR) ADC and a Sigma Delta modulator The coarse ...
MEI Jinshuo, CUI Tianbao
doaj +1 more source
High Linearity SAR ADC for Smart Sensor Applications [PDF]
This paper presents capacitive array optimization technique to improve the Spurious Free Dynamic Range (SFDR) and Signal-to-Noise-and-Distortion Ratio (SNDR) of Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) for smart sensor ...
Cen, Yuanjun +7 more
core +1 more source
Comparator Design in Sensors for Environmental Monitoring [PDF]
This paper presents circuit design considerations of comparator in analog-to-digital converters (ADC) applied for a portable, low-cost and high performance nano-sensor chip which can be applied to detect the airborne magnetite pollution nano particulate ...
Fan, Hua +4 more
core +1 more source
Free Speech and Its Relation to Self-Government by Alexander Meiklejohn [PDF]
In today’s system-on-chip (SoC) implementations, power consumption is a key performance specification. The proliferation of mobile communication devices and distributed wireless sensor networks has necessitated the development of power-efficient analog ...
Fraenkel, Osmond K.
core +2 more sources
Low-Power SAR ADCs: Basic Techniques and Trends
With the advent of small, battery-powered devices, power efficiency has become of paramount importance. For analog-to-digital converters (ADCs), the successive approximation register (SAR) architecture plays a prominent role thanks to its ability to combine power efficiency with a simple architecture, a broad application scope, and technology ...
openaire +3 more sources
Analogue to Digital and Digital to Analogue Converters (ADCs and DACs): A Review Update [PDF]
This is a review paper updated from that presented for CAS 2004. Essentially, since then, commercial components have continued to extend their performance boundaries but the basic building blocks and the techniques for choosing the best device and ...
Pickering, J.
core +3 more sources
A 10-bit Charge-Redistribution ADC Consuming 1.9 μW at 1 MS/s [PDF]
This paper presents a 10 bit successive approximation ADC in 65 nm CMOS that benefits from technology scaling. It meets extremely low power requirements by using a charge-redistribution DAC that uses step-wise charging, a dynamic two-stage comparator and
Elzakker, Michiel van +5 more
core +2 more sources

