Results 41 to 50 of about 47,863 (340)

Enhanced Sensitivity of Silicon-On-Insulator Surface Plasmon Interferometer With Additional Silicon Layer

open access: yesIEEE Photonics Journal, 2011
It is theoretically found that by adding a thin silicon layer (35 nm) on top of our previously proposed surface plasmon interference (SPI) biosensor in silicon on insulator (SOI), a sensitivity enhancement of up to 2500 nm/refractive index units (RIUs ...
Khai Q. Le, Peter Bienstman
doaj   +1 more source

Reflectionless grating coupling for silicon-on-insulator integrated circuits [PDF]

open access: yes, 2011
We propose a novel grating coupler design which is inherently reflectionless by focusing the reflected light away from the entrance waveguide.
Baets, Roel   +6 more
core   +1 more source

Effect of Gate Dielectric Material on the Electrical Properties of MoSe2-Based Metal–Insulator–Semiconductor Field-Effect Transistor

open access: yesCrystals, 2022
In this study, we fabricated metal–insulator–semiconductor field-effect transistors (MISFETs) based on nanolayered molybdenum diselenide (MoSe2) using two insulator materials, silicon dioxide (SiO2) and silicon nitride (SiN).
Abdelkader Abderrahmane   +3 more
doaj   +1 more source

Suitability of applying ultrathin SOI‐based PIN diodes to photodetection of UV wavelength

open access: yesElectronics Letters
This work intends to investigate the impact of silicon layer thickness and substrate biasing on the UV photodetection efficiency of PIN diodes fabricated with ultra‐thin body and buried oxide (UTBB silicon‐on‐insulator [SOI]) technology, aiming to verify
Fernando O. S. Silva, Rodrigo T. Doria
doaj   +1 more source

Junctionless nanosheet gate‐all‐around transistors fabricated on void embedded silicon on insulator substrate

open access: yesElectronics Letters, 2023
A novel junctionless gate‐all‐around (GAA) transistor with ultrathin nanosheet GAA channel and self‐aligned raised source/drain (RSD) is successfully designed and fabricated on void embedded silicon on insulator (VESOI) substrate through a much simpler ...
Zhiqiang Mu   +5 more
doaj   +1 more source

An Integrated Evanescent Field Sensor for the Simultaneous Measurement of Layer Refractive Index and Thickness

open access: yesSensors, 2021
A novel integrated sensor for the simultaneous measurement of layer refractive index and thickness based on evanescent fields is proposed. The theoretical limits for the accuracy of the sensor were examined for the example of a TiO2 layer.
Matthias Jäger   +5 more
doaj   +1 more source

On-dimensional off-chip beam steering and shaping using optical phased arrays on silicon-on-insulator [PDF]

open access: yes, 2011
Optical beam steering can find applications in several domains such as laser scanning, LiDAR (Light Detection And Ranging), wireless data transfer and optical switches and interconnects.
Karel Van Acoleyen   +4 more
core   +2 more sources

Exploring Dipolar Dynamics and Ionic Transport in Metal‐Organic Frameworks: Experimental and Theoretical Insights

open access: yesAdvanced Functional Materials, EarlyView.
In this study, the interplay of dipolar dynamics and ionic charge transport in MOF compounds is investigated. Synthesizing the novel structure CFA‐25 with integrated freely rotating dipolar groups, local and macroscopic effects, including interactions with Cs cations are explored.
Ralph Freund   +6 more
wiley   +1 more source

High-Power-Compatible Thick Silicon-on-Insulator Waveguide: An Implementation in Optical Phased Array

open access: yesIEEE Photonics Journal
High-power transmission capability is a critical yet insufficiently explored frontier in integrated photonics. Owing to the restricted optical cross-sectional area of the 220 nm-thick silicon layer, conventional SOI platform is incapable of managing the ...
Jingsi Chen   +6 more
doaj   +1 more source

Porous Silicon on Insulator Technology

open access: yesJournal of Scientific Research and Reports, 2022
In this research, the structure, optical, and electrical properties of porous silicon prepared by electrochemical etching at current density 50 mA /cm2 with etching time 10 min, before and after rapid thermal oxidation process (RTO) at different oxidation temperature from (500-700) Ċ and constant oxidation time 60 s.  Under optimum conditions, the pore
openaire   +1 more source

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