Results 211 to 220 of about 3,860 (261)
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Electrical activation of arsenic implanted in silicon on insulator (SOI)
Journal of Physics D: Applied Physics, 2007Electrical activation of arsenic implanted in silicon on insulator (SOI) was studied. Two SOI structures with different Si overlayers and buried oxide thicknesses were used in this work. The As+ implantations were performed with a single energy of 20 keV to doses of 5 × 1014 cm−2 or 2 × 1015 cm−2 in both substrates.
R M de Oliveira, M Dalponte, H Boudinov
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Basics of Silicon-on-Insulator (SOI) Technology
2004Silicon is by far the most widely used semiconductor material. It is abundant in earth’s crust and relatively easy to convert into a high-purity single crystal. Unlike some other semiconductor materials silicon is stable when heated at high temperature, and a well-behaved insulating and passivating material, silicon dioxide, can readily be grown on it.
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Multimode Interference (MMI) Couplers in SOI (Silicon-on-insulator)
Integrated Photonics Research, 1995Silicon based integrated optics is attracting an increasing amount of interest due to low inherent loss at 1.3 μm and 1.5 μm and to the potential for transforming VLSI techniques from microelectronics to integrated optics. Different schemes for waveguides based on silicon technology have been proposed and examined [1-3]. Kurdi et al.
Thomas Zinke +2 more
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Development of small silicon modulators in silicon-on-insulator (SOI)
SPIE Proceedings, 2003Silicon-based optical modulators are expected to be important components in some optical networks. The optical modulation mechanism can be achieved either via the plasma dispersion effect, or by thermal means. Both are relatively slow processes when utilized in large (multi micron) waveguide structures, which researchers tend to concentrate on for ease
Ching Eng Png +4 more
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The future of silicon-on-insulator (SOI) technology in microelectronic systems
2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573), 2005After many years of materials development and circuit research, silicon-on-insulator (SOI) technology clearly has become a viable approach for high performance microelectronics. As semiconductor technology continues to scale, the value of an SOI materials platform continues to expand.
Z.J. Lemnios, D.J. Radack, J.C. Zolper
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Silicon-on-insulator SOI as a photonics platform
200512th International Symposium on SOI Technology and Devices, May 2005, Quebec ...
Xu, D-X +5 more
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Ultrathin Silicon-an-Insulator (SOI) Wafer for Compliant Substrate
2017 IEEE 44th Photovoltaic Specialist Conference (PVSC), 2017Compliant substrate is one of the most promising approaches for heteroepitaxy of the semiconductor devices. SOI wafer is the only commercial structure used for the compliant substrate researches. Yet, previous studies reported ineffectiveness of SOI as a compliant substrate for thickness regions above 10 nm.
Shinyoung Noh +4 more
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T-Shaped Body Silicon-on-Insulator (SOI) MOSFET
2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings, 2006A novel partially-depleted (PD) silicon-on-insulator (SOI) MOSFET with a T-shaped body (TSB) is proposed for the first time. Simulation results demonstrate that the proposed structure provides nano-scaled PD SOI devices with much better short channel effect immunity and sub-threshold characteristics than those of UTB SOI devices.
Ji Cao +5 more
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Laser Processing in Silicon on Insulator (SOI) Technologies
1984Silicon on insulator (SOI) technologies are an attractive alternative for VLSI circuit manufacturing, owing to such advantages as reduced parasitic capacitances, latch-up immunity and insensitivity to alpha particles. SOI technologies may be also viewed as a first but necessary step towards 3-D integration.
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Silicon-on-insulator (SOI) wafer fabrication for MEMS applications
SPIE Proceedings, 2003In this paper, it is shown that Silicon-On-Insulator (SOI) wafers with good surface finish and thickness control can be realized using Silicon Fusion Bonding along with an optimized ethylenediamine-pyrocatechol-water (EDP) etching approach. Single crystal diaphragms of 11 μm thickness have been fabricated using these SOI wafers.
Bhimanadhuni R. KotiReddy +3 more
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