Results 41 to 50 of about 53,263 (293)
Molecular beam epitaxy of InAs nanowires in SiO2 nanotube templates: challenges and prospects for integration of III-Vs on Si [PDF]
Guided growth of semiconductor nanowires in nanotube templates has been considered as a potential platform for reproducible integration of III-Vs on silicon or other mismatched substrates.
Dubrovskii, Vladimir G. +8 more
core +2 more sources
Single Crystalline Mesoporous Silicon Nanowires [PDF]
Herein we demonstrate a novel electroless etching synthesis of monolithic, single-crystalline, mesoporous silicon nanowire arrays with a high surface area and luminescent properties consistent with conventional porous silicon materials. These porous nanowires also retain the crystallographic orientation of the wafer from which they are etched. Electron
Hochbaum, A.I. +3 more
openaire +3 more sources
Background: Elongated nanostructures, such as nanowires, have attracted significant attention for application in silicon-based solar cells. The high aspect ratio and characteristic radial junction configuration can lead to higher device performance, by ...
Robin Vismara +4 more
doaj +1 more source
Thermal transport in 2D and 3D nanowire networks
We report on thermal transport properties in 2 and 3 dimensions interconnected nanowire networks (strings and nodes). The thermal conductivity of these nanostructures decreases in increasing the distance of the nodes, reaching ultra-low values.
Lacroix, David +2 more
core +3 more sources
Nanoscale field effect transistor for biomolecular signal amplification [PDF]
We report amplification of biomolecular recognition signal in lithographically defined silicon nanochannel devices. The devices are configured as field effect transistors (FET) in the reversed source-drain bias region. The measurement of the differential
Carol Rosenberg +6 more
core +2 more sources
A hierarchical porous copper current collector is fabricated via three‐dimensional printing combined with pressureless sintering to stabilize lithium metal anodes. The interconnected architecture lowers local current density, guides uniform Li deposition within pores, and suppresses dendrite growth.
Alok Kumar Mishra, Mukul Shukla
wiley +1 more source
Incorporation of Phosphorus Impurities in a Silicon Nanowire Transistor with a Diameter of 5 nm
Silicon nanowire (SiNW) is always accompanied by severe impurity segregation and inhomogeneous distribution, which deteriorates the SiNWs electrical characteristics.
Yanfeng Jiang +3 more
doaj +1 more source
Medium Doped Non-Suspended Silicon Nanowire Piezoresistor using SIMOX substrate [PDF]
This paper reports on the enhanced piezoresistive effect in p-type <110> silicon nanowires, fabricated using a top down approach. The silicon nanowire width is varied from 100 to 500nm with thickness of 200 nm and length of 9µm.
Bailie, I. +5 more
core +1 more source
This study investigates H4TBAPy‐based metal–organic frameworks (MOFs) ‐ NU‐1000, NU‐901, SrTBAPy, and BaTBAPy ‐ for multiphoton absorption (MPA) performance. It observes topology‐dependent variations in the 2PA cross‐section, with BaTBAPy exhibiting the highest activity.
Simon N. Deger +10 more
wiley +1 more source
Impact of randomly distributed dopants on Ω-gate junctionless silicon nanowire transistors [PDF]
This paper presents experimental and simulation analysis of an Ω-shaped silicon junctionless nanowire field-effect transistor (JL-NWT) with gate lengths of 150 nm and diameter of the Si channel of 8 nm.
Asenov, Asen +5 more
core +1 more source

