Results 31 to 40 of about 12,859 (264)
A novel junctionless gate‐all‐around (GAA) transistor with ultrathin nanosheet GAA channel and self‐aligned raised source/drain (RSD) is successfully designed and fabricated on void embedded silicon on insulator (VESOI) substrate through a much simpler ...
Zhiqiang Mu +5 more
doaj +1 more source
A novel integrated sensor for the simultaneous measurement of layer refractive index and thickness based on evanescent fields is proposed. The theoretical limits for the accuracy of the sensor were examined for the example of a TiO2 layer.
Matthias Jäger +5 more
doaj +1 more source
A compact silicon-on-insulator polarization splitter [PDF]
A compact directional coupler-based polarization splitter is designed and realized using silicon-on-insulator (SOI) waveguides. Even though silicon does not have any material birefringence, the high index contrast obtained in the SOI platform and reduced waveguide dimensions makes it possible to induce significant birefringence.
Kiyat I., Aydinli, A., Dagli, N.
openaire +4 more sources
Low‐voltage FIB‐SEM tomography combined with a image preprocessing pipeline improves phase contrast and enables reliable machine‐learning segmentation of conductive networks in lithium‐ion battery electrodes. Structural descriptors are extracted from segmented images, done semimanually and automated, and compared.
Lisa Beran +6 more
wiley +1 more source
A reconfigurable logic‐in‐memory cell composed of triple‐gated feedback field‐effect transistors implements multiple combinational logic functions within a single configuration. By utilizing program gates as dynamic input terminals, the proposed cell performs full adder, full subtractor, 2‐to‐1 multiplexer, and 4‐to‐2 encoder operations without ...
Minhyeok Seol +5 more
wiley +1 more source
Modeling and Analysis of SOI Gratings-Based Opto-Fluidic Biosensor for Lab-on-a-Chip Applications
The design, modeling, and analysis of a silicon-on-insulator (SOI) grating coupler integrated with a microfluidic channel for lab-on-a-chip applications are presented. The grating coupler was designed to operate at 1310 nm.
Venkatesha Muniswamy +2 more
doaj +1 more source
Strained Silicon-On-Insulator - Fabrication and Characterization [PDF]
Abstract not Available.
Reiche, M. +14 more
openaire +3 more sources
An all‐in‐one analog AI accelerator is presented, enabling on‐chip training, weight retention, and long‐term inference acceleration. It leverages a BEOL‐integrated CMO/HfOx ReRAM array with low‐voltage operation (<1.5 V), multi‐bit capability over 32 states, low programming noise (10 nS), and near‐ideal weight transfer.
Donato Francesco Falcone +11 more
wiley +1 more source
Lighting up silicon nanoparticles with Mie resonances
As an indirect semiconductor, silicon shows notoriously inefficient luminescence. Here, the authors utilize the Mie resonances in silicon nanoparticles to demonstrate visible white-light emission, both from free-standing spheres and particles etched on a
Chengyun Zhang +9 more
doaj +1 more source
Dimension Effect on Breakdown Voltage of Partial SOI LDMOS
Dimension effect on breakdown voltage (BV) of lateral double-diffused metal-oxide–semiconductor field-effect transistor in partial silicon-on-insulator (PSOI) technology is comprehensively studied.
Yue Hu +8 more
doaj +1 more source

