Results 201 to 210 of about 4,018 (263)
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Transconductance of Silicon-on-Insulator (SOI) MOSFET's
IEEE Electron Device Letters, 1985Transconductance of n-channel Silicon-on-Insulator (SOI) MOSFET's has been measured with backside gate (substrate) bias as a parameter. For negative values of the backside gate bias, transconductance of SOI transistors is similar to that of bulk devices.
J -P Colinge
exaly +2 more sources
Silicon-on-insulator (SOI) as a Photonics Platform
ECS Meeting Abstracts, 2006Abstract not Available.
Dan-Xia Xu +4 more
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Nanophotonic applications for silicon-on-insulator (SOI)
SPIE Proceedings, 2004Silicon-on-insulator is a proven technology for very large scale integration of microelectronic devices. The technology also offers the potential for development of nanophotonic devices and the ability to interface such devices to the macroscopic world.
Paul R. de la Houssaye +2 more
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Development of small silicon modulators in silicon-on-insulator (SOI)
SPIE Proceedings, 2003Silicon-based optical modulators are expected to be important components in some optical networks. The optical modulation mechanism can be achieved either via the plasma dispersion effect, or by thermal means. Both are relatively slow processes when utilized in large (multi micron) waveguide structures, which researchers tend to concentrate on for ease
Ching Eng Png +4 more
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Silicon-on-insulator (SOI) structures for pressure sensors
Sensors and Actuators A: Physical, 1991Abstract The zone-melting-recrystallization method of preparating silicon-on-insulator (SOI) films, its variations, advantages, disadvantages, and its applicability for pressure sensors are considered in this article. The method of artificial epitaxy (graphoepitaxy) allows microstructures in SOI films to be controlled.
Eugene I. Givargizov +3 more
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High voltage silicon-on-insulator (SOI) MOSFETs
[1991] Proceedings of the 3rd International Symposium on Power Semiconductor Devices and ICs, 2002Novel lateral high-voltage SOI MOSFETs capable of withstanding up to 400 V are presented. The design optimization, fabrication, and experimental results obtained for these devices are presented. The devices can be implemented using a CMOS-SOI compatible process.
Q. Lu, P. Ratnam, C.A.T. Salama
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Silicon-on-insulator (SOI) by bonding and ETCH-back
1985 International Electron Devices Meeting, 1985A silicon wafer bonding process is described in which only thermally grown oxide is present between wafer pairs. Bonding occurs after insertion into an oxidizing ambient. It is proposed the wafers are drawn into intimate contact as a result of the gaseous oxygen between them being consumed by oxidation, thus producing a partial vacuum.
J.B. Lasky +3 more
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VLS growth of silicon whiskers on a patterned silicon-on-insulator (SOI) wafer
Journal of Crystal Growth, 1996Abstract An array of VLS silicon whiskers, over 500 μm in length, under 20 μm diameter and 60 μm in pitch, has been grown on the silicon pattern of a SOI wafer. The “mesa method”, in which VLS whiskers were grown on silicon mesas topped with gold hats, was successfully applied to determine growth sites to micrometer accuracy.
Yoshihiko Okajima +3 more
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Stress-induced birefringence in silicon-on-insulator (SOI) waveguides
SPIE Proceedings, 2004We show that stress engineering can be used to adjust the SOI waveguide birefringence to the stringent polarization tolerances expected of commercial devices, using only standard silicon processes. With decreasing device dimensions and high index contrast the waveguide birefringence becomes increasingly sensitive to device geometry.
Winnie N. Ye +7 more
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